Will there be GDDR 6 ??

[Kaotik]

GDDR4?

Wasn't GDDR5 heavily worked on by AMD as well?

As far as I know, ATI/AMD wasn't heavily involved in either one, both were either done completely by JEDEC (meaning, no individual company spearheading the design like ATI did with GDDR3) or GDDR4 by Samsung & GDDR5 probably by Qimonda

 

[AlNom]

As far as I know, ATI/AMD wasn't heavily involved in either one

ATI was heavily involved in GDDR4.

http://theovalich.wordpress.com/200...r5-analysis-or-why-gddr5-will-rule-the-world/

 

[Kaotik]

ATI was heavily involved in GDDR4.

Thanks for the correction, I tried googling but couldn't find anything specific about GDDR4/5 developers besides JEDEC and Samsung/Qimonda releasing info and sampling first chips etc

 

[AlNom]

Found something about GDDR5 (accordin to Theo): http://theovalich.wordpress.com/200...r5-analysis-or-why-gddr5-will-rule-the-world/

And also here, in the "Wavey saves the day" article.

 

[Rangers]

I read somewhere that the reason AMD cards memory controllers clocked GDDR5 higher than Nvidia ones, prior to Kepler, was because they helped make it.

Nvidia was supposedly proud of finally catching up to AMD memory speeds with Kepler.

 

[UniversalTruth]

It confuses me.

This brought us to more than 250GB/s achiveable bandwidth, meaning that the purpose of Differential GDDR5 was lost.

From the vr-zone link.

Ok, but Differential GDDR5 could increase that achievable bandwidth up to 500 GB/s.
So, why replacing Differential GDDR5 which doubles the bandwidth with GDDR6 which would also double it?

They don't even say if it's single or double-ended.

For something that's supposedly coming out in two-something-two-and-a-half maybe years, they sure are secretive. Surely, these decisions have already been made by now?

I expect the first products with GDDR6 in late 2014/ early 2015.
You have Sea Islands coming later this year, then one more generation for late 2013 and the generation after that with GDDR6 support. /just me of course, could be GDDR6 for the generation after Sea Islands.

 

[AlNom]

Ok, but Differential GDDR5 could increase that achievable bandwidth up to 500 GB/s.
So, why replacing Differential GDDR5 which doubles the bandwidth with GDDR6 which would also double it?

DE signals do require a lot more wires...

 

[aaronspink]

DE signals do require a lot more wires...

Not really. When you factor in shielding wires for single ended signalling vs differential signalling, they come out basically even for any high speed domain.

 

[AlNom]

Ah... neat.

So why wouldn't you use DE (as originally asked)? Is it simply experience with the interface vs doubling prefetch?

 

[no-X]

You have Sea Islands coming later this year,…

According to DigiTimes Sea Islands generation will be manufactured in 2012, but launched in Q1/2013.

 

[aaronspink]

Ah... neat.

So why wouldn't you use DE (as originally asked)? Is it simply experience with the interface vs doubling prefetch?

DE has somewhat higher silicon design costs/compexity and requires running your transmitters and receivers at generally higher frequency.

Most of SE advantages are when you are at a lower speed domain. At some point wire/pins wise though you do hit the point where you need a 1:1 ratio between shields and signal wires with SE. And at that point DE ends up making more sense. You drop down to a 1:2 ratio between shields and signal wires and can generally run on the order of 2x data rate with the same loss budget (a lot of the variable get taken away as they affect both sides of the differential signal equally). There are also various power issues involved between the choice for differential and SE signalling.

 

[UniversalTruth]

There are also various power issues involved between the choice for differential and SE signalling.

3 Options after GDDR5

• GDDR5 Single-ended I/O
- Max. 8Gbps with same power
• GDDR5 Differential I/O
- Max. 14Gbps with much more power
• HBM*
(Wide I/O with TSV)
- Lower speed with many I/Os and low power

Linkie

So, where is the GDDR6 in this equation?

 

[AlNom]

Larger pre-fetch, probably.

 

[upnorthsox]

Linkie

So, where is the GDDR6 in this equation?

There isn't any, GDDR5 will take us to stacked memory. Then we'll learn a new nomenclature.

 

[UniversalTruth]

There isn't any, GDDR5 will take us to stacked memory. Then we'll learn a new nomenclature.

I think we are all being confused.
Why would VRzone care to write their article with GDDR 6 coming in 2014.
And second- how will you stuck memory on your motherboard? How will you upgrade this memory?

There is a need of faster classic memory.

 

[upnorthsox]

I think we are all being confused.
Why would VRzone care to write their article with GDDR 6 coming in 2014.
And second- how will you stuck memory on your motherboard? How will you upgrade this memory?

There is a need of faster classic memory.

That's DDR4 and of course you can have a split memory pool of on chip (actually on interposer) and off chip for the APU. Discreet gpu's will still have their own un-upgradable memory like always.

There's a GDDR6 spec out there but it'll probably end up being like GDDR4, under used and quickly eclipsed.

Btw, one of the reasons that the DDR4 spec is so late is they're still finalizing the stack memory specs for it.

 

[aaronspink]

I think we are all being confused.
Why would VRzone care to write their article with GDDR 6 coming in 2014.
And second- how will you stuck memory on your motherboard? How will you upgrade this memory?

There is a need of faster classic memory.

If wide i/o and/or stack DRAM become commodity then we'll be in a different play space. GPUs will start to have 2 separate pools of memory.

Figure 2-4 wide i/o/stacked drams each with something like 64-256 GB/s of bandwidth and total capacity of 1-2 GBs (2 Gb/4 Gb drams). So total bandwidth on the order of 256-512 GB/s. If you need more capacity, you use normal DDR4 or GDDR5. Done.

 

[UniversalTruth]

Yeah, but that means that you are trying to convince us that DDR4 or GDDR5 is the end of the world and there is nothing beyond it. Which is really funny. There will be GDDR6, GDDR7, etc...

 

[DavidGraham]

Allow me to exploit this opportunity and ask about the underlying mechanism of GDDR5 large data output , even though it is based on the same 8n prefetch buffer of DDR3 .

Initially I thought it is Quad pumped and I wondered why not name it QDR? , then I thought it came with a bigger buffer (12n or 16n maybe) then I discovered this is wrong , and that it uses two write clocks and so I was back to thinking QDR again ,I know this is wrong but still I can't quite wrap my head around that concept , does that mean it operates internally at twice the speed of normal DDR3?

If not , then how does it able to achieve such data rates ?

 

[aaronspink]

Allow me to exploit this opportunity and ask about the underlying mechanism of GDDR5 large data output , even though it is based on the same 8n prefetch buffer of DDR3 .

Initially I thought it is Quad pumped and I wondered why not name it QDR? , then I thought it came with a bigger buffer (12n or 16n maybe) then I discovered this is wrong , and that it uses two write clocks and so I was back to thinking QDR again ,I know this is wrong but still I can't quite wrap my head around that concept , does that mean it operates internally at twice the speed of normal DDR3?

If not , then how does it able to achieve such data rates ?

It doesn't. DRAMs actually read out a lot more than the send. Basically they read out the whole 8n prefetch in a single cycle and then transfer that out. To enable back to back data out at data rates higher than an individual bank can sustain, GDDR5 uses the concept of bank groups and forced interleaving between the bank groups. There are 4 defined bank groups, each containing 4 banks. Read commands are not allowed back to back within a bank group but can be done between the bank groups. There is a parameter that determines the min timing interval for subsequent reads to the same bank group as well as a parameter for min cmd timing between reads to a different bank.