When are the 65nm PS3's and XB360's shipping?

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Are there any hi-res shots of the motherboard without heatspreaders? Because it would be much easier to measure the shrink when comparing to the ports, etc.
 
Aren't these pics enough to state there's no shrinkage? If the dies were substantially smaller and cooler, it'd be a waste of money to keep the same size heat-spreader rather than shrink it as is invariably what happens. The negligible difference in size ought to be enough to say, whatever's going on with 65nm, it's still not appearing in consoles yet!
 
So, what about the CPU, does anyone believe that has had a shrink to 65nm? Given the power usage reduction in the Halo 3 360 it seems something has changed, surely losing a few resistors/capacitors on the motherboard isn't going to lower power useage that much...is it?
 
So, what about the CPU, does anyone believe that has had a shrink to 65nm? Given the power usage reduction in the Halo 3 360 it seems something has changed, surely losing a few resistors/capacitors on the motherboard isn't going to lower power useage that much...is it?

No, but its pretty hard to base a lot on this one test and the photos given that totally lack scale. I'd certainly like to see something more professional done with some testing methodology before I'd go making big conclusions.
 
No, but its pretty hard to base a lot on this one test and the photos given that totally lack scale. I'd certainly like to see something more professional done with some testing methodology before I'd go making big conclusions.

Yeah, I'd like to see the Llama guys or Ben Heckendorn get their hands on one of the Halo 3 console to give it a good once over.
 
Some rough measurements show the original die (from the size of the shiny cover) is 16% of the board size (active board, dark green and excluding the borders), and the new GPU is 14% of the board size. This would be an extremely lousy process shrink!

90 > 80nm optical shrink?
 

Truly bizzare..both have clearly shrunk, but not enough to be 65nm LOL..

Combined with the power usage change, one does suspect something is going on.

Maybe they are just cleaning up the extraneous stuff in new revisions? Remember Carl B's old Sony die shrink chart, one or more times a simple revision led to more shrinkage than a true process shrink did, IIRC.

Is it possible the package is changing size, throwing off our perceptions?

A true way to find out more, would be for someone with an old unit and a H3/very new unit to actually measure all the dies with a ruler..
 
Rangers good call on the chart, might as well bring it out here for reference. It's just often the case that a full node shrink like 90nm --> 65nm doesn't immediately yield the full 50% shaving... that may require further process maturity/revisions down the line. But, the 80nm theory may be what's going on here as well. It's hard to know, because every report that has come out has backed up 65nm. But, whatever the case, it's not too greatly shrunk.

Almost as interesting to me as the die shots themselves are the shots of the PSU amperage. Do we have a picture of what may be a new power supply in the Halo edition? It might help us to determine if power requirements have changed.

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Personally, I'd wager that the difference in the EDRAM die is just the difference between going from NEC to TSMC. Even though a process may be labelled "90nm", or whatever, there still can be some significant variances in gate size, which will impact in the final die size.
 
Personally, I'd wager that the difference in the EDRAM die is just the difference between going from NEC to TSMC. Even though a process may be labelled "90nm", or whatever, there still can be some significant variances in gate size, which will impact in the final die size.

I agree.

That PS2 chart is a bit confusing. Is EE 3 & 4 on .15um? GS 5 & 6 on .13um? What about GS 3 & 4? :???: It seems they did their own optimizing within a process node...
 
Personally, I'd wager that the difference in the EDRAM die is just the difference between going from NEC to TSMC. Even though a process may be labelled "90nm", or whatever, there still can be some significant variances in gate size, which will impact in the final die size.

There is a clear difference between the "main core" size, too, though not big, it's clear.
 
That looks like the same chip though. We all pretty much agreed that it isn't 65nm.

... is anyone gonna tell them that? LOL
 
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