Predict: The Next Generation Console Tech

[Shifty Geezer]

Actually scratch that, given some decent chunk EDRAM with read-modify-write access, SPUs can do miracles.

I quite like that idea. Combine PS2's best bits with PS3 for PS4. Could ahve 2 different Cells, one geared towards geberal processing and the other with a chunk of transistors given over to eDRAM. Of course it's not as developer friendly as a standard GPU and in that respect is perhaps a bad idea, as next gen I think developers won't want to go 'weird' at all if they can help it.

 

[psorcerer]

It´s actually because of the way the FlexIO bus has been set up between the Cell and the RSX. The RSX can control more of the available BW, Cell has been assigned just a fraction.

You are wrong. The problem is in RSX crossbar which has problems writing to external bus. AGP wasn't able to read fast... I think the crossbar design was changed only for G92 and later.

 

[assen]

The coherent cache may be more programmer friendly but it's not hardware friendly, it'll require more power and will severely restrict scalability.

I have issues with that "but" there. The main limiting factor today is programmer attention span; having a programmer friendly architecture trumps almost everything else. This wasn't the case 10 years ago.

If PS4 runs Larrabee, could you install Windows on it?! If so, the implications are staggering.

There's a huge chasm between "Larrabee cores running a x86-derived instruction set" and "Larrabee can boot Windows". The OS "lives" in the non-computational parts of the processor - memory management, protection, virtualization - and this will be probably very different on Larrabee than on the mainline x86 CPUs.

 

[Crossbar]

You are wrong. The problem is in RSX crossbar which has problems writing to external bus. AGP wasn't able to read fast... I think the crossbar design was changed only for G92 and later.

Do you have a source to back that up? That can hardly be the reason for the slow write (Cell -> VRAM) can it?

BTW the 7800 cards were PCI-express cards an AGP version 7800 GS were introduced later on. Not saying they didn´t contain some old AGP-inheritage, but anyway.

 

[psorcerer]

Do you have a source to back that up?

Sources for NV cards internals? These people are under NDA, you know.

That can hardly be the reason for the slow write (Cell -> VRAM) can it?

And what's so slow in 20Gb/sec?

BTW the 7800 cards were PCI-express cards an AGP version 7800 GS were introduced later on. Not saying they didn´t contain some old AGP-inheritage, but anyway.

There was no need to read anything from graphics card on the PC. It started with AGP and then went on and on. Even now nobody reads VRAM on PC - unusable.

 

[fellix]

That can hardly be the reason for the slow write (Cell -> VRAM) can it?

It's about slow read from the video memory pool:

 

[Squilliam]

TOKYO, February 8, 2009 — Toshiba Corporation (TOKYO: 6502) today announced the prototype of a new FeRAM -Ferroelectric Random Access Memory-that redefines industry benchmarks for density and operating speed. The new chip realizes storage of 128-megabits1 and read and write speeds of 1.6-gigabytes a second2 , the most advanced combination of performance and density yet achieved3 . Full details of the new FeRAM will be presented this week at the International Solid-State Circuits Conference 2009 (ISSCC2009) in San Francisco, USA.
The new FeRAM modifies Toshiba's original chainFeRAM TM architecture, which significantly contributes to chip scaling, with a new architecture that prevents cell signal degradation, the usual tradeoff from chip scaling. The combination realizes an upscaled FeRAM with a density of 128-megabit. Furthermore, a new circuit that predicts and controls the fluctuations of power supply supports high-speed data transfers. This allowed integration of DDR2 interface to maximize data transfers at a high throughput at low power consumption, realizing read and write speeds of 1.6 gigabytes a second. In developing the new FeRAM, Toshiba broke its own record of 32-megabit density and 200-megabites-a-second data transfers, pushing performance to eight times faster than the transfer rate of the previous records and the fastest speed of any non-volatile RAM.

Link

Can anyone tell me how they think this techology could be useful for a next generation console?

Could they use it as a cross between a very fast SSD or cache, say 4GB+ which can also be used to store some downloadable content and save the game state so people can pause the game and come back to it whereever they are?

Is it fast enough to semi-replace some of the ram in the system?

What other things could it be used for?

 

[fellix]

Did you said cartridges!

I can see WiiNext being even smaller, e.g. quasi-pocket format...

 

[Crossbar]

Sources for NV cards internals? These people are under NDA, you know. .

So it was just speculation on your part. That´s fine since you are open about it.

And what's so slow in 20Gb/sec?.

Sounds pretty slow to me. Fellix chart says 4 GB/s which is a bit faster, but still
much slower than the speed the RSX can access the XDRAM.

There was no need to read anything from graphics card on the PC. It started with AGP and then went on and on. Even now nobody reads VRAM on PC - unusable.

But the RSX does not have an AGP bus and Nvidia has made plenty of memorycontrollers with integrated graphics, so it wouldn´t really be new tech for if they wanted to distribute the FlexIO BW differently. BTW the max BW of AGPx8 was 2 GB/s (write speed).

 

[Crossbar]

Can anyone tell me how they think this techology could be useful for a next generation console?

A 32 MB memory sounds ridicilous when there are 2 GB single chip flash memories on the market. It will probably find its niche due to the high read speed, but the type of application depends heavily on the price. Devices running on batteries sounds like an initial target market.

 

[psorcerer]

Sounds pretty slow to me. Fellix chart says 4 GB/s which is a bit faster, but still much slower than the speed the RSX can access the XDRAM.

Yep, blit.

But the RSX does not have an AGP bus and Nvidia has made plenty of memorycontrollers with integrated graphics, so it wouldn´t really be new tech for if they wanted to distribute the FlexIO BW differently. BTW the max BW of AGPx8 was 2 GB/s (write speed).

Here they have measured 4Gb/sec, which is 2 times better than AGP 8x
And read from AGP worked with PCI speed - 132Mb/sec.
So?
RSX is a PC architecture chip, e.g. CPU does not need to read from VRAM, you need to use blit for fast write, no texture streaming per frame.

 

[Rangers]

That's assuming MS go the high-end expensive route too. If we follow the concerns about limited price reductions due to limited process shrinks over the life of the next generation, starting at a high price would mean ending at a relatively high price. It's just another option to consider.

I dont know, I was just thinking maybe Sony went with Larrabee because they have decided not to pursue hi end technology next gen? Perhaps likewise MS might have turned down Larrabee because they do plan to go hi tech/uber powerful?

It's just a lot of thinking though. And assumes so many different things. But if I'm right in 3 years I want credit

It's just the one company I expect least likely to go "low tech" is MS, because of that interview I have referenced a thousand times where they stated they dont believe they have the right IP to do a Wii like console.

My envisioned scenario might be like this: Intel approaches Sony and MS..MS says "No, we are going with a big honking fixed function ATI GPU next time" Sony says "yeah, we are interested in that, we are not worried about having the most power next time we are doing something new"

Anybody think that has the slightest validity? Is it even thought that ATI/Nvidia will be delivering GPU's that exceed Larrabee in pure gfx performance or not?

 

[Crossbar]

Here they have measured 4Gb/sec, which is 2 times better than AGP 8x
And read from AGP worked with PCI speed - 132Mb/sec.
So?
RSX is a PC architecture chip, e.g. CPU does not need to read from VRAM, you need to use blit for fast write, no texture streaming per frame.

Nvidias memory controllers with integrated graphics certainly had higher read/write speed from the CPU side, so it would hardly be rocket science for Nvidia to distribute the bandwidth differently if that is your theory.

My point is that that the FlexIO bus is configured into a fixed number of directed channels with a total fixed bandwidth. If they wanted to give the CPU a higher read speed for VRAM some of the other channels would have to be reduced. I think the current FlexIO configuration was chosen after careful analysis.
They decided that fast access to XDRAM is far more important for RSX than the Cells access to VRAM, but some write bandwidth (4 GB/s) certainly comes in handy when for example loading textures from the storage media to VRAM.

 

[pc999]

We have no idea what kind of performance, or even price and power consumption (althought some say it is expensive and hot).

So it is hard to say, anyway, I am quite sure that even if not better in gfx it should be better in other things.

Anyway from not being a Wii to being a high end machine is a very long distance.

 

[psorcerer]

Nvidias memory controllers with integrated graphics certainly had higher read/write speed from the CPU side, so it would hardly be rocket science for Nvidia to distribute the bandwidth differently if that is your theory.

The question is: why do they need it?

My point is that that the FlexIO bus is configured into a fixed number of directed channels with a total fixed bandwidth.

Ok, Rambus is blatantly lying about FlexIO performance, is that your point?
It's blatantly lying about the clock speed and bandwidth, right?
And it doesn't matter that FlexIO and RDRAM XIO design information is openly available at Rambus site.
Do you suggest that NVidia, that never published any info about their hardware and all the information is collected by reverse engineering, is right and Rambus is wrong?

 

[Crossbar]

The question is: why do they need it?

The question was originally why you claim it´s because of some limit in the "RSX crossbar" that was later changed in the G92.

Ok, Rambus is blatantly lying about FlexIO performance, is that your point?
It's blatantly lying about the clock speed and bandwidth, right?
And it doesn't matter that FlexIO and RDRAM XIO design information is openly available at Rambus site.
Do you suggest that NVidia, that never published any info about their hardware and all the information is collected by reverse engineering, is right and Rambus is wrong?

I think you should go back and read the specs of how the FlexIO bus works on Cell. If you still don´t understand what I mean, please tell me and I will try to explain it to you,

 

[psorcerer]

The question was originally why you claim it´s because of some limit in the "RSX crossbar" that was later changed in the G92.

Yep, they had no need to change anything, so they didn't change.

I think you should go back and read the specs of how the FlexIO bus works on Cell. If you still don´t understand what I mean, please tell me and I will try to explain it to you,

No, I still do not understand, please explain.
Last time I've checked it was two 32-bit XIO cells from one side and two 6-lanes FlexIO on the other side.

 

[Crossbar]

Yep, they had no need to change anything, so they didn't change.

So maybe it was a conscious design decision and not a hardware limitation after all? Nevermind, I am getting bored.

No, I still do not understand, please explain.
Last time I've checked it was two 32-bit XIO cells from one side and two 6-lanes FlexIO on the other side.

You should read a little bit more carefully.
http://www-01.ibm.com/chips/techlib/techlib.nsf/products/Cell_Broadband_Engine

This is what I was talking about:

At the physical layer, a total of seven transmit and five receive Rambus RRAC FlexIO bytes can be dedicated to up to two separate logical interfaces,

 

[liolio]

I dont know, I was just thinking maybe Sony went with Larrabee because they have decided not to pursue hi end technology next gen? Perhaps likewise MS might have turned down Larrabee because they do plan to go hi tech/uber powerful?

It's just a lot of thinking though. And assumes so many different things. But if I'm right in 3 years I want credit

It's just the one company I expect least likely to go "low tech" is MS, because of that interview I have referenced a thousand times where they stated they dont believe they have the right IP to do a Wii like console.

My envisioned scenario might be like this: Intel approaches Sony and MS..MS says "No, we are going with a big honking fixed function ATI GPU next time" Sony says "yeah, we are interested in that, we are not worried about having the most power next time we are doing something new"

Anybody think that has the slightest validity? Is it even thought that ATI/Nvidia will be delivering GPU's that exceed Larrabee in pure gfx performance or not?

Well I'm actually surprised (if true) that MS let Sony get the deal with Intel. As I really think that the MS/Intel may have been more synergic, my opinion earlier was that Ms may the only one able to provide good enough tools to makes the most of such a chip.
On the other side Intel may think that sony with it cheer editing is the most potent partner to showcase its chip. Sony can live with lesser third party support than Ms. I'm sure that the one like as Insomniac are indeed pretty turn on by the choice and would be willing to work on the larrabee. I wouldn't either dismiss the ambitions of Sony to provide something pretty potent, Sony may think my dev teams will be able to pull out some soft pretty unique from this chip.

In regard to the chip itself, well we know really few but I would not dismiss it as a contender for what ever ATI/Nvidia will push by this time. We learn today that the 40nm process from TMSC may not hold on its promise especially in regard to power consumption, basically even without questioning larrabee architecture efficience we should not overlook the excellence of Intel process. In this regard the situation is even more problematic for Nvidia than for ATI.
In 2012 we speak at least of the larrabee second iteration and a chip likely to be a process generation ahead of his competitor, really larrabee may very well qualify for "ubber tech".

In regard to the tool I think that Intel alone might be able to profide something better than whatever Sony came or may have come with, Intel will provide good library, thread building block and the best compilers along with good profiling tools.

I think that if it's true its pretty much a good news if such a chip managed to make its way in one of our future system

 

[psorcerer]

You should read a little bit more carefully.
http://www-01.ibm.com/chips/techlib/techlib.nsf/products/Cell_Broadband_Engine

This is what I was talking about:

total of seven transmit and five receive Rambus RRAC FlexIO bytes

7 + 5 = 12 = 6 + 6
12 = 16 - 4

7 - 1 SB= 6 out
5 - 1 SB = 4 in

Theoretically:
6 out = 24 Gb/sec
4 in = 16 Gb/sec