I think he means that he wants to see unified memory with 64bit addressing - mainly this implies 4GB or more RAM to play around with. Unified memory means you have to make it fast because the GPU will be addressing it too and it is much, much more bandwidth hungry than a CPU.
Currently, Hynix is the leader in GDDR5 - they have 2Gbit chips operating at 7GHz and producing 28GB/s throughput on a 32bit bus. To get 2GB you have to have 8 of those on a 256bit bus, and the throughput then is 224GB/s (quite close to the bandwidth of the 10MB daughter die in Xenos).
You could have 4GB with 16 chips on a 512bit bus, giving 448GB/s bandwidth. At least bandwidth wise it would then be worthy of next gen, but again, all the advantages of bandwidth go out the window the moment you're constrained by RAM space. Then it becomes a game of degrading your texture quality until it fits.
Currently, Hynix is the leader in GDDR5 - they have 2Gbit chips operating at 7GHz and producing 28GB/s throughput on a 32bit bus. To get 2GB you have to have 8 of those on a 256bit bus, and the throughput then is 224GB/s (quite close to the bandwidth of the 10MB daughter die in Xenos).
You could have 4GB with 16 chips on a 512bit bus, giving 448GB/s bandwidth. At least bandwidth wise it would then be worthy of next gen, but again, all the advantages of bandwidth go out the window the moment you're constrained by RAM space. Then it becomes a game of degrading your texture quality until it fits.