Playstation 5 [PS5] [Release November 12 2020]

Discussion in 'Console Technology' started by BRiT, Mar 17, 2020.

  1. ToTTenTranz

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    We don't know any official measurements from the PS5's SoC, nor do we have proper measurements made with a caliper. The margin of error for the people doing pixel counts out of video stills of the PCB filmed at an angle tends to be enormous.
    The SeriesX has no Infinity Cache because Microsoft has shown the SoC's xrays and did a breakdown of the chip's caches, but they're also using a considerably larger GDDR6 bandwidth than even the RX 6900XT that has almost twice the compute performance.

    We also shouldn't think of the 128MB amount as the fixed size of Infinity Cache for all GPUs of all sizes. Considering its significantly smaller GPU, the PS5 could make do with e.g. 56MB of LLC.

    Where is this rumor coming from? I'm expecting Navi 21 to not go too much above 400-450mm^2, and Navi 22 to not go a lot above Navi 10, as AMD stated they've increased density between RDNA1 and RDNA2.
     
  2. Erinyes

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    We don't have official measurements of course but it's not that the estimates should be off by substantial amounts. I'd expect them to be within 5-10% of the actual.

    The whole reason the XSX has the larger memory interface is because it dosen't have the cache (or vice versa), but keep in mind it's still 14 Gbps compared to the 16 Gbps of RX6800/6900.

    1 MB of cache is ~1mm2 and an 8 core Zen 2 block from Renoir is ~50mm2. The PS5 die size has been estimated at ~310 mm2. If we take the Navi 10 die size (251 mm2) as a starting point for the PS5 as they have a very similar GPU configuration and CPU cores, we already get ~300 mm2. There are some additional misc blocks, and they are of course on the same process. Unless you're suggesting that the PS5 SoC is almost as big as the XSX at ~360 mm2, it's almost certain that it doesn't have (a large) infinity cache.
    Initial rumours/leaks had pegged N21, N22 and N23 as ~515 mm2, 340 mm2, and 240 mm2 respectively. Another "leak" with N23 at ~235 mm2 came out recently.

    Given that it has 26.8B transistors, N21 with 450mm2 would have a transistor density of ~60M/mm2 and ~67M/mm2 at 400 mm2. Both of these are significantly higher than N10 (~42 M/mm2) and given that AMD has also achieved higher clocks, which usually decrease density (though not always), it seems more likely that it's closer to 500 mm2. Cache is quite dense of course and this would have helped density, but I doubt to the extent you're expecting.
     
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  3. Jawed

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    I don't agree with some of the details of your analysis, but:

    [​IMG]

    I do agree there is no indication that PS5 has "missing die space" that would imply it uses Infinity Cache (scaled down) like that seen in Navi 21.
     
  4. London Geezer

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    I simply cannot wait for the inevitable “simple” Dead Cells kind of Indy game which can push the hardware - especially RT and god knows what else -
    in ways that to me are much more intriguing than the obvious big blockbuster games.
     
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  5. turkey

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    It will really help thoes with poor to no vision. Probably not their target audience but these should make a large difference to the partially or blind players.

    If it can be that neuanced then I hope they can expand on it in a similar way to colour blind video output.

    Haptics reacting to the movement of the controller well as the game to allow the feeling of the direct surrounding or to give context to an object ahead. I don't know but it seems like something that could be very powerful if correctly and consistently applied to games.
     
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  6. Unknown Soldier

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    Another Dualsense breakdown. He breaks it down and builds it up again.

     
    #6346 Unknown Soldier, Nov 2, 2020
    Last edited: Nov 2, 2020
  7. London Geezer

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    Eurogamer review of Dirt 5 has this little gem:

    Getting ready for a big blowout later this week then! If Dirt 5 lifts, perhaps a lot more embargoes on games will lift!
     
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  8. PSman1700

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    That's why i like Steam. Probably never going to happen, but i would like to see a steam client on the PS5 (and xbox consoles).
     
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  9. BRiT

    BRiT (>• •)>⌐■-■ (⌐■-■)
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    I think all embargoes are up Thursday, but maybe that's only for one side?
     
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  10. pjbliverpool

    pjbliverpool B3D Scallywag
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    It's not really any bigger in practice. You're looking at 560GB/s shared across the CPU + GPU (with the CPU taking up to around 60GB/s) vs 512GB/s dedicated to the GPU.

    Wouldn't the size be based on the size of the render target which is in turn based on resolution? So with the PS5 needing to target 4k surely it would also need 128MB?

    Back in the days of the X360 and XBO when the consoles had similar embedded memory setups, the argument to why the PC couldn't do the same was that you wouldn't know how much memory to include on the die because PC's target multiple resolutions.

    However now that we seem to have settled on 4k as the upper reasonable maximum, with all the 6800 and above series expected to be able to target that, sizing the cache for 4K seems like a safe bet. I wouldn't be surprised to see the 67xx series feature less memory with a target of 1440p even though they may have as much or more core power than the PS5. But in this instance the PS5 would be disadvantaged by it's need to target 4k.

    This may also explain why Nvidia are so keen to show off 8K performance on the 3090. It's conceivable that might tank on the 6900.
     
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  11. ToTTenTranz

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    A 10% error on a "measured 310mm^2" SoC can make it go up to 341mm^2.



    1MB cache is 1mm^2 on the Zen 2 cores, where the cache needs to clock at up to 4.8GHz. In the case of the consoles we're looking at less than half of those clocks, so the cache can use more density-optimized transistors which would supposedly result in lower die area per MB.
    AMD did mention the cache in Navi 21 is optimized for density, after all.


    You're assuming there are no improvements to transistor density between RDNA1 and RDNA2.
    Has this been stated by AMD?


    Take away ~50GB/s for the CPU (equivalent of 128bit DDR4 3200MT/s) on the SeriesX's and you do get 510GB/s , meaning you get almost twice the VRAM bandwidth per-TFLOPs on the SeriesX than you get for a 6900XT, effectively explaining its lack of Infinity Cache.

    Now take away the same 50GB/s for the CPU on the PS5 and you get 398GB/s for the GPU. A Navi 22 with its rumored 192bit GDDR6 at 16Gbps gets 384GB/s. Navi 22 is expected to carry Infinity Cache (less than Navi 21's of course), and Cerny did hint that we should expect a desktop GPU that is similar to the PS5's.



    The PS5 doesn't need to target 4K. On the contrary, I've yet to see any 1st-party Sony dev claiming they'll need to target 4K this generation (unlike the statements from many Microsoft devs BTW).
    Games with cross-gen visuals may have the headroom for full 4K rendering, but come the games with true next gen visuals (e.g. looking like the Unreal Engine 5 demo) and I'm not counting on many (if any) of them doing full 4K rendering.

    Furthermore, we don't even know if the Infinity Cache's hit rate scales linearly with resolution. From the bandwidth requirements there's a chance the LLC isn't even going to be used for the framebuffer.
     
  12. Love_In_Rio

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    And we know in the PS5 APU there is SRAM for the IO block. It could be 2 MB, 32 or 64. Would be logical it´s the infinity cache the SSD writes directly to.
     
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  13. pjbliverpool

    pjbliverpool B3D Scallywag
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    I see where you're going with that, but is it not a simpler explanation to simply compare the XSX flops:bandwidth ratio to that of the PS5's where we discover they are both pretty much equal? In fact PS5's is a little higher than the XSX which would help with the bigger proportional hit it takes from the CPU bandwidth. Your suggestion that the PS5 has IC on top of that would give it bandwidth far in excess of the XSX. If it had that, it's pretty likely Sony would have mentioned it by now.


    It seems to me that it would have been an incredibly risky strategy for Sony to design a next gen console which from the get go was effectively designed to be unable to render at 4K in next gen games. That's assuming as you say the IC is sized based on the target FB which it may not be.
     
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  14. Love_In_Rio

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    That´s also the thing. I find it strange if it was the case Sony wouldn´t already said it. But on the other hand, is strange since the Cerny presentation, that those in the known seemed perplexed for things Cerny didn´t say. Who knows, surely there is nothing more.
     
  15. Tabris

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  16. chris1515

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    Thursday is Xbox and friday is Playstation.
     
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  17. Love_In_Rio

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    #6357 Love_In_Rio, Nov 2, 2020
    Last edited: Nov 2, 2020
  18. Jay

    Jay
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    Is that just for Dirt 5?
     
  19. AbsoluteBeginner

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    It was more about people being perplexed in the way this was described, and not what was described.

    Also for most developers kick ass dev tools + ease of development and special quirks (controller) will ourweight 20% difference in TFLOPs. They can effectively lower the resolution by certain amount and voila! But they cant do the same if your dev tools are more challanging and you give them umbrella GDK for 2 consoles and PC.

    On topic of PS5 having IC, not seeing this based only on die size. Die size looked to be very much in low 300mm² so ~50-60mm² more for Series X makes sense I guess with 16CUs more and 64bit PHY.

    Besides, Cerny always mentioned special HW solutions (additional Async Compute/FP16), doubt Sony would be so tight lipped if it had such an advantage over XSX.
     
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  20. chris1515

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    For everything.
     
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