Official PS3 Thread

[jvd]

What is that? It has all the ingrediants of the ps3, if it's not ps3 then by all means tell me what it is.

It is probably a significantly weaker version of what will be in ps3, a way to throw off competitors into making h/w to compete with a far weaker version of what will really be out there... no good player shows his true hand before playing it...

Or it can be a more powerfull chip than what they have , like bluffing that your holding 4 aces when you have nothing . Of course i'm not saying cell wont be used in ps2. Which cell chip is the question . Its like saying an intel chip would be used the xbox 2 and later in the speech announcing the ithium 3 . We all know they will never use that chip. But the press will love to run with the head line .

 

[zidane1strife]

The tech used to manufacture the chips in ps3 is most likely 65nm 1B+ transistor processors are possible on that tech, and those can most certainly perform, if designed for it, 1Tflops+, I believe.

 

[jvd]

The tech used to manufacture the chips in ps3 is most likely 65nm 1B+ transistor processors are possible on that tech, and those can most certainly perform, if designed for it, 1Tflops+, I believe.

Well no micron process is being used yet. Since .65 doesn't exist yet we don't know the yeild and clock speed it will be able to hit .

They said cell will be in the ps3. They didn't say which cell nor did they give specs for it. Till they do i don't think anyone should go around saying the ps3 will have a 1tflop chip. Because if sony releases the ps3 at 800gflops or so everyone will rush to the defence of sony saying they never said 1tflop only thier fans. Yet the damage will be done. Any other system coming out will have had to deal with the 1tflop monster . We can talk about rumors but we shouldn't make them into facts when there is still at least 2 years before the system comes out .

 

[Paul]

And what does your article say mfa? not a whole lot, it basicly goes over how they went about making it. It does not make reference to the power being lower than originaly expected, which was 1tflop. Although it even supports the 1tflop claim made by sony and a few others, than proved in
IS the patent for sure Cell? It might NOT be, however there is more the patent.

While the trio isn't making specific promises, the chip's performance is rumored to be in range of a teraflop, roughly 100 times more powerful than today's Pentium 4 chips.
evidence to support the claim than not. Hell it could be an entirely different design JUST FOR ps3. However, the similarities between Cell and this "patent" are very VERY similar you agree? Powerwise and the architecture.

Maybe sony is using some ideas from cell and putting them into the emotion engine 3? Perhaps.

And then sony stating that preset memory will not be fast enough for ps3 which is why they will use yellowstone? What type of processor will be THAT fast in ps3? Well there is only one we know of right now, which is cell or whatever the hell that patent is correct?

 

[jvd]

And what does your article say mfa? not a whole lot, it basicly goes over how they went about making it. It does not make reference to the power being lower than originaly expected, which was 1tflop. Although it even supports the 1tflop claim made by sony and a few others, than proved in the patent.

While the trio isn't making specific promises, the chip's performance is rumored to be in range of a teraflop, roughly 100 times more powerful than today's Pentium 4 chips.

IS the patent for sure Cell? It might NOT be, however there is more evidence to support the claim than not. Hell it could be an entirely different design JUST FOR ps3. However, the similarities between Cell and this "patent" are very VERY similar you agree? Powerwise and the architecture.

Maybe sony is using some ideas from cell and putting them into the emotion engine 3? Perhaps.

Mabye or mabye they will use a lower powered chip. What is so hard to understand. Sony has yet to say anything about specifics on chips. Right now all they have to say , ps3 - cell - 1 tflop and everyone assumes the ps3 will have a 1tflop performance. Now everyone is running with it and now they have a ton of free marketing.

 

[Paul]

Your also forgetting how they said that ps3 will be 1000x the power of ps2, which for that, I fail to see how they will use anything but a 1tflop cpu correct?

 

[V3]

From the patent, if you work it out, their goal is 1 TFLOPS for BE.

Here

[0068] FIG. 4 illustrates the structure of an APU. APU 402 includes local memory 406, registers 410, four floating point units 412 and four integer units 414. Again, however, depending upon the processing power required, a greater or lesser number of floating points units 512 and integer units 414 can be employed. In a preferred embodiment, local memory 406 contains 128 kilobytes of storage, and the capacity of registers 410 is 128.times.128 bits. Floating point units 412 preferably operate at a speed of 32 billion floating point operations per second (32 GFLOPS), and integer units 414 preferably operate at a speed of 32 billion operations per second (32 GOPS).

And this one

[0066] For example, as shown in FIG. 3, four PEs may be packaged or joined together, e.g., within one or more chip packages, to form a single processor for a member of network 104. This configuration is designated a broadband engine (BE). As shown in FIG. 3, BE 301 contains four PEs, namely, PE 303, PE 305, PE 307 and PE 309. Communications among these PEs are over BE bus 311. Broad bandwidth memory connection 313 provides communication between shared DRAM 315 and these PEs. In lieu of BE bus 311, communications among the PEs of BE 301 can occur through DRAM 315 and this memory connection.

And this one

[0062] The basic processing module for all members of network 104 is the processor element (PE). FIG. 2 illustrates the structure of a PE. As shown in this figure, PE 201 comprises a processing unit (PU) 203, a direct memory access controller (DMAC) 205 and a plurality of attached processing units (APUs), namely, APU 207, APU 209, APU 211, APU 213, APU 215, APU 217, APU 219 and APU 221. A local PE bus 223 transmits data and applications among the APUs, DMAC 205 and PU 203. Local PE bus 223 can have, e.g., a conventional architecture or be implemented as a packet switch network. Implementation as a packet switch network, while requiring more hardware, increases available bandwidth.

Its their goal to get 1 TFLOP chip. Beyond that is speculation IMO.

 

[Paul]

Jesus Jvd, THERE IS ONLY ONE TYPE OF CELL POWER RIGHT NOW. Which is 1TFLOP.

 

[jvd]

Your also forgetting how they said that ps3 will be 1000x the power of ps2, which for that, I fail to see how they will use anything but a 1tflop cpu correct?

1000x the power of ps2 or a 100x the ps2 ? Both can mean anything . It can be a 1000x the mhz of the ps2 . It can be a 1000x times faster at cooking an egg . It could be a 1000x faster at controling weapons for 3rd world countrys. Its so vague it can mean a 1000 x faster at destroying your sperm count for all any of us know . Its called marketing hype. U know like how the p4 would speed up your internet ?

 

[Paul]

I'm pretty sure Sony means 1000X the total power.. use your brain.

 

[jvd]

Jesus Jvd, THERE IS ONLY ONE TYPE OF CELL POWER RIGHT NOW. Which is 1TFLOP.

Technicly there is no type of cell power (whatever that means) right now as there is just a piece of paper that is cell. Read v3's post .

 

[jvd]

I'm pretty sure Sony means 1000X the total power.. use your brain.

I do use my brain. Thats why i don't take any claims seriously till i see the hardware.

 

[Paul]

You continue to say how there will be different power versions of Cell yet you cannot back up your claim. Sony has said Cell will do 1tflop, so unless it ends up not happening somehow, it will be 1tflop as of now.

 

[jvd]

You continue to say how there will be different power versions of Cell yet you cannot back up your claim. Sony has said Cell will do 1tflop, so unless it ends up not happening somehow, it will be 1tflop as of now.

Well i can't argue with that lodgic . Sony says the cell chip is capable of 1 tflop. They also said the cell chip was expandable (adding more apus ) . Btw sony has never said that hte ps3 will do 1tflop , they said thier goal is . But whatever dude. If the chip comes out and its less then 1tflop i will have these threads bookmarked so you can't go back and say oh yea sony never said it would do 1tflop. I will just keep throwing these right at u.

 

[Vince]

This thread is pathetic. We have mods posting utter BS that can be described as nothing but long-term inflamatory in nature (Missing Q's rational thinking right about now), Chap's running loose as usual....


And Marco of all people:

Wether the patent has anything to do with PS3 is an open issue ... but if you read the article I linked and still maintain the patent defines Cell you need to work on your deductive reasoning.

Cell's high level architecture was designed together with IBM (well it would probably be more accurate to say "largely by IBM") long after that patent was filed.

Deductive Reasoning, as in the thought process you've failed to apply to this?

http://appft1.uspto.gov/netacgi/nph...&s1=20020138637&OS=20020138637&RS=20020138637

Inventors: Suzuoki, Masakazu; (Tokyo, JP) ; Yamazaki, Takeshi; (Tokyo, JP)

Serial No.: 816004
Series Code: 09
Filed: March 22, 2001*

Phase 1: Conceptual Design
Within a few months of the project launch, Kahle had successfully refereed a conceptual design that satisfied all the stakeholders*. The stage was set for the engineers to begin digging into the actual work of designing the chip.

http://www.designchain.com/coverstory.asp?issue=spring03


The patent that these guys are throwing around is nothing BUT a conceptual design. There's no 'hard' microarchitecture discussed. There is no floorplan, nothing. Nobody is talking about the patent being based of finished nelists or GDSII tapes that are inroute to Fishkill, NY and Oita for a production run. It's a glorified concept that's yet to be implimented. Hell, we can draw one [eg. patent] similiar up this weekend over some beer. You, better than anyone, should know this.

Beyond this lack of deductive reasoning, SCEI approached IBM with the idea in 2000. This would fall inline with the only other 3D dealing I've been knowledgable of at decent resolution - which is the GP-3dfx merger which saw almost a year of prior talks and joint R&D before a public deal was announced.

Look, if your going to undertake a line of argument against the patent or it's underlying architecture, then do it based on something substantive (or factual). But, thanks for inflaming the trolls!


* Bold is Vince's.

 

[Paul]

Sony did say it, and it's not like they said it and have nothing to back up their claims. You have the patent telling us how they will do it.

 

[jvd]

Vince how am i uttering bs . Your telling me that sony has stated that a 1tflop cell chip will be used in the ps3? Your telling me that there will only be 1 version of the cell chip ? Your telling me that companys never miss thier goal ? Please let me know what bs i'm saying ? I'd like to know . Since everything i have said is based on commen sense.

 

[V3]

Different version of cell you ask ?



Here is one example.

Note that when you said cell, you are really referring to Processor Element. Broadband Engine for example contained 4 PE

[0071] FIGS. 5-10 further illustrate the modular structure of the processors of the members of network 104. For example, as shown in FIG. 5, a processor may comprise a single PE 502. As discussed above, this PE typically comprises a PU, DMAC and eight APUs. Each APU includes local storage (LS) . On the other hand, a processor may comprise the structure of visualizer (VS) 505. As shown in FIG. 5, VS 505 comprises PU 512, DMAC 514 and four APUs, namely, APU 516, APU 518, APU 520 and APU 522. The space within the chip package normally occupied by the other four APUs of a PE is occupied in this case by pixel engine 508, image cache 510 and cathode ray tube controller (CRTC) 504. Depending upon the speed of communications required for PE 502 or VS 505, optical interface 506 also may be included on the chip package.

Configuration example:

[0072] Using this standardized, modular structure, numerous other variations of processors can be constructed easily and efficiently. For example, the processor shown in FIG. 6 comprises two chip packages, namely, chip package 602 comprising a BE and chip package 604 comprising four VSs. Input/output (I/O) 606 provides an interface between the BE of chip package 602 and network 104. Bus 608 provides communications between chip package 602 and chip package 604. Input output processor (IOP) 610 controls the flow of data into and out of I/O 606. I/O 606 may be fabricated as an application specific integrated circuit (ASIC). The output from the VSs is video signal 612.

[0073] FIG. 7 illustrates a chip package for a BE 702 with two optical interfaces 704 and 706 for providing ultra high speed communications to the other members of network 104 (or other chip packages locally connected). BE 702 can function as, e.g., a server on network 104.

[0074] The chip package of FIG. 8 comprises two PEs 802 and 804 and two VSs 806 and 808. An I/O 810 provides an interface between the chip package and network 104. The output from the chip package is a video signal. This configuration may function as, e.g., a graphics work station.

[0075] FIG. 9 illustrates yet another configuration. This configuration contains one-half of the processing power of the configuration illustrated in FIG. 8. Instead of two PEs, one PE 902 is provided, and instead of two VSs, one VS 904 is provided. I/O 906 has one-half the bandwidth of the I/O illustrated in FIG. 8. Such a processor also may function, however, as a graphics work station.

[0076] A final configuration is shown in FIG. 10. This processor consists of only a single VS 1002 and an I/O 1004. This configuration may function as, e.g., a PDA.

 

[Paul]

Within a few months of the project launch, Kahle had successfully refereed a conceptual design that satisfied all the stakeholders

Ahhh so I guess the patent was the conceptual design?

 

[jvd]

Within a few months of the project launch, Kahle had successfully refereed a conceptual design that satisfied all the stakeholders

Ahhh so I guess the patent was the conceptual design?

um where did u get the quote so i can make a comment based on the whole context rather than just a quote .