Official PS3 Thread
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qwerty2000
Newcomer
well thank you for correcting my mistakes in my estmates for the ps3. Is 32mb of edram good for the vram
megadrive0088
Regular
CPU: 500 million transistors or more
GPU: well 500 million would be the absolute minimum since there's no way it's going to be smaller than the CPU. the GS was over 3x the transistor count (43M) of the EE (13M) thanks to GS's eDRAM. So I would say the PS3 GPU could have 1B or more transistors, 2B going by GS to EE ratio.
so at the very least, we are talking 1 Billion transistors for the
whole PS3. though I'd say it's possible there could be anywhere
from 1Billion+ to 2.5 Billion, total, in PS3.
GPU: well 500 million would be the absolute minimum since there's no way it's going to be smaller than the CPU. the GS was over 3x the transistor count (43M) of the EE (13M) thanks to GS's eDRAM. So I would say the PS3 GPU could have 1B or more transistors, 2B going by GS to EE ratio.
so at the very least, we are talking 1 Billion transistors for the
whole PS3. though I'd say it's possible there could be anywhere
from 1Billion+ to 2.5 Billion, total, in PS3.
qwerty2000
Newcomer
sorry for asking but what are transtiers 
Deepak said:How much heat would this beast generate??
Consider this: today a top of the line GeforceFX has 130 million transistors. Going by moores law, by 2006, Nvidia will be making chips with over 500 million transistors. 1 billion transistors seems to be stretching things, but then again three years from now who knows???
Josiah said:
GPU's generally outpace Moore's Law quite well due in no small part to the fact that their product cycle is 6 months and generally speaking a 'new' architecture comes out ever year or so. Hardly the case with CPUs.
As for a Billion transistors, I read that there are already devices being planned for the 90nm process with counts approaching that. But, I'm hardly the person to state anything concrete about this...
excuse my blasphemy... but who the hell is this Mr Moore and why do we all have to obey to his so called *law*?
i mean, this is a guy who predicted that transistor counts and performace would double in a set amount of time and blah blah blah.
that does not mean that, given enough resources, transistor counts and especially performance cannot double in a shorter but even longer period of time.
the fact that a guy convinced lots of people that "it is very likely that transistor counts might double every 18 months" does not do it for me...
we are seeing that Moore's law is not valid when LOADS of resources are put into a single project (like Cell).
the fact that performance has little to do with transistor counts is even more of a confirmation.
i mean, this is a guy who predicted that transistor counts and performace would double in a set amount of time and blah blah blah.
that does not mean that, given enough resources, transistor counts and especially performance cannot double in a shorter but even longer period of time.
the fact that a guy convinced lots of people that "it is very likely that transistor counts might double every 18 months" does not do it for me...
we are seeing that Moore's law is not valid when LOADS of resources are put into a single project (like Cell).
the fact that performance has little to do with transistor counts is even more of a confirmation.
Sigh, this is sad.
Moore's law isn't a law. It's an observation. I can't remember the guys first name, but he worked at Intel at the time. He noticed that every 18 months the transistor count of DRAM kept doubling, this has held up. Realise, that it's specific to DRAM and it doesn't relate to anything else.
Whatever implementation of Cell is used, it wouldn't suprise me if it was over a billion. Consider the number of transistors that would go into a hypothetical DRAM IC which had the storage capacity of 256Mb (32 MB of RAM) for the memory cells alone -- hint: 1 cell:1 transistor + capacitor. Then it's a matter of how much embedded DRAM there will be in the implementation that's the majority of your transistor count.
Additionaly, realise that eDRAM and logic circuitry have different densities, where eDRAM density > logic density.
The PIII coppermine has about 32 million transistors, IIRC. While the 2meg cache PIII Xeon has 140 million transistors. Two things, IIRC, the PIII has rougly 7 million logic transistors and this cache is SRAM which 6 or 4 transistors per cell.
Moore's law isn't a law. It's an observation. I can't remember the guys first name, but he worked at Intel at the time. He noticed that every 18 months the transistor count of DRAM kept doubling, this has held up. Realise, that it's specific to DRAM and it doesn't relate to anything else.
Whatever implementation of Cell is used, it wouldn't suprise me if it was over a billion. Consider the number of transistors that would go into a hypothetical DRAM IC which had the storage capacity of 256Mb (32 MB of RAM) for the memory cells alone -- hint: 1 cell:1 transistor + capacitor. Then it's a matter of how much embedded DRAM there will be in the implementation that's the majority of your transistor count.
Additionaly, realise that eDRAM and logic circuitry have different densities, where eDRAM density > logic density.
The PIII coppermine has about 32 million transistors, IIRC. While the 2meg cache PIII Xeon has 140 million transistors. Two things, IIRC, the PIII has rougly 7 million logic transistors and this cache is SRAM which 6 or 4 transistors per cell.
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