Official PS3 Thread

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unlike MS , which comes up with a shrunk desktop
Yeah man! I mean, they look so similar you can barely distinguish them apart! :rolleyes:

pccasevsxbox.jpg
 
Panajev2001a said:
look at the motherboard pictures... and rotate 90 degrees the Desktop PC's picture...



If anything the ps2 on its stand looks like a pc . But regardless they are all pcs . Does it really matter which one has the sleaker plastic ? If anything the least pc looking one is the gamecube. ITs a friggen little fat box .
 
I was trying to highlight the difference in design philosophies

Sony -> consumer electronics
MS -> PC oriented
Nintendo -> games , fun looking

Although I do believe and hope the next gen of Xbox is better looking than the current one.

btw I also meant that PS2 is quite at home among my dvd player/ home theater system
while Xbox looks ugly among them

I do believe Playstation design is more japanese influenced and I expect it to continue that way for PS3 too. It will be nice and functional. And may very well look like a Blu Ray disk player and hopefully with wireless controller it wont have connectors in front ;)
 
who would want wireless controllers? I cant stand wireless everytime I am in a middle of a game bam the batteries go out... who wants to charge their console controllers?
 
vrecan said:
who would want wireless controllers? I cant stand wireless everytime I am in a middle of a game bam the batteries go out... who wants to charge their console controllers?

I do and many other people too would like to have a wireless controller.
We are talking about something that is going to be released 2 - 3 years later and you think there will no progress in this area ?

It would be actually good if the capability is built into PS3 so if any controller goes down the system automatically pauses the game. If the controller can run continuosly for upto 6-8 hours on single charge that would really be ok for most of the people. For who play continuosly for 24+ hours theres the option of buying two of them so they can replace the controller while playing.
One controller to play one to charge ...and sony can sell more controllers this way too ;)

It would be good if PS3 has some kind of generic wireless interface built into it like bluetooth maybe.
 
once you go wireless, you wont be looking back.

as long as i can get around 4-6 hours of playtime per session + vibration + a good distance + desktop charging with cellphone batteries, im there! it will also work great as a remote for settop boxes like PS3 and XB2. :oops:

who wants to charge their console controllers?
I dont mind letting it charge overnight! :D
 
crystalcube said:
vrecan said:
who would want wireless controllers? I cant stand wireless everytime I am in a middle of a game bam the batteries go out... who wants to charge their console controllers?

I do and many other people too would like to have a wireless controller.
We are talking about something that is going to be released 2 - 3 years later and you think there will no progress in this area ?

It would be actually good if the capability is built into PS3 so if any controller goes down the system automatically pauses the game. If the controller can run continuosly for upto 6-8 hours on single charge that would really be ok for most of the people. For who play continuosly for 24+ hours theres the option of buying two of them so they can replace the controller while playing.
One controller to play one to charge ...and sony can sell more controllers this way too ;)

It would be good if PS3 has some kind of generic wireless interface built into it like bluetooth maybe.


would it not be wiser to just buy different batteries depending on your desires? i mean a normal player would only need a battery that can last like 6-8 hours maximum. a more hardcore gamer would buy a (more expensive) battery that can last to up to, i don't know, 14 hours (who actually plays for 14 hours straight is beyond me)... and the batteries kinda go shitty after months, just like cellphones batteries, so u'd need to change batteries. no need to change the whole controller....
 
I had mono once and i played almost that long ... nothing else to do ... beat alot of games junior year of highschool haha
would it not be wiser to just buy different batteries depending on your desires? i mean a normal player would only need a battery that can last like 6-8 hours maximum. a more hardcore gamer would buy a (more expensive) battery that can last to up to, i don't know, 14 hours (who actually plays for 14 hours straight is beyond me)... and the batteries kinda go shitty after months, just like cellphones batteries, so u'd need to change batteries. no need to change the whole controller....
 
chap,

Somewhile back, you mentioned a japanese newspaper article quoting Ken Kutaragi about PS3. What did he say?
 
Interesting article....

Thread designs divide chip makers; should they be skinny or fat?

Thread designs divide chip makers; should they be skinny or fat?
By Dean Takahashi
Mercury News


The makers of the world's fastest microprocessors are engaged in a theological debate: Which are better, fat threads or skinny threads?

The high priests at Sun Microsystems, Intel, IBM and Advanced Micro Devices are betting on designs that will determine who will control the multibillion-dollar server computing market.

All agree that a technique called chip multithreading, or getting a chip to execute several independent programs (threads) simultaneously, will be useful in an era where they have hundreds of millions of transistors at their disposal. But they disagree about when and how.

Sun is betting on skinny threads, which break a program into many parts. Each part is executed more slowly, but at the same time. By pouring resources into skinny threads, Sun thinks it can outrun those focusing on what amount to fat-thread dragsters.

``The others were racing to build the fastest processor, but they were running the wrong race,'' said David Yen, executive vice president for Sun's Sparc chip division. ``The others cannot so easily abandon the paths they were on. By going our way, we think we can simplify computing and get a lot more work done.''

IBM, Intel and AMD have put their money on fat threads, or processing one or a few software programs extremely fast. They recognize the value of adding more threads, but they say Sun's approach comes at the expense of performance on a single thread.

``Sun is doing something extreme because they are struggling to find something that no one else is offering,'' said Ravi Arimilli, an IBM fellow and chief server architect. ``They are losing their high-end market share and looking for new territory.''

Yen's architects believe that memory latency, or the delay that results when a fast processor has to stop what it's doing to fetch data from a slow memory chip, is the main bottleneck in today's servers. Server processors have become like a Ferrari engine that runs at 150 mph but can't get enough gas to keep running.

To tackle this problem, Sun is designing chips that, when they debut in 2005, will have four processors that each handle four threads, or the subprograms that can be executed independently. This way, whenever a processor stalls because it has to fetch data, it moves from one thread to another.

``Memory has been falling behind for a long time,'' said Yen. ``Rather than fight it, we're learning to deal with it. It's a fundamental change of mind.''

Reversing the trend

Each of Sun's processors won't be as speedy as Intel's Itanium or IBM's Power chips. But Sun has long given up on dominating computing on the desktop.

The bet is a crucial one for Sun, whose UltraSparc chips have lost ground to Intel's 32-bit Xeon and 64-bit Itanium chips. Observers say that Sun, which has reported eight quarters of weak financial results, needs something to reverse the trend.

``If this gives Sun's customers hope, the customers will hang in there,'' said Nathan Brookwood, an analyst at Insight 64 in Saratoga. ``I believe Sun's theory makes a lot of sense and they are better positioned to pursue this path than a lot of folks.''

Sun has always had to justify why it spends hundreds of millions a year on chip research when big rivals like Hewlett-Packard are relying on Intel for next-generation server microprocessors. The pressure has been rising as customers defect to Intel.

``2005 is a long way away,'' said Gary Campbell, vice president of strategic architectures at Hewlett-Packard, which has teamed up with Intel. ``They have a weakness before then.''

Strategy

The way that Sun came to its new religion on chip design doesn't necessarily inspire confidence. Marc Tremblay, a chip architect, proposed a new architecture called MAJC that used multithreading in 1999. That chip was geared for multimedia and was aimed at outdoing the graphics performance of Silicon Graphics. But it didn't take off and Sun didn't immediately apply the lessons to designing server processors. Meanwhile, Intel launched Itanium in 2000.

``If Sun had taken the people working on MAJC and put them on a server processor, they might be ahead of the game now,'' said Peter Glaskowsky, editor in chief of the Microprocessor Report. ``I don't think it's too late now, but they could have done this better.''

Instead, it took a start-up to force Sun to solve its internal debate about how to move forward. Les Kohn, a former Sun chip architect and Stanford engineering professor Oyekunle Olukotun started Afara Websystems in 2000 to create multithreaded Sparc microprocessors. While other chips had become hopelessly complex in their quest for speed, Afara felt that simpler processors running lots of threads would be faster.

In July 2002, Sun agreed to buy Afara for $28 million. That ended the debate inside Sun.

The company plans to launch a 16-thread chip in 2005 and a 32-thread chip in 2006. Such chips fit with Sun's software strategy, since its Java programming language and Solaris operating systems are far better at handling threads than rival technologies. Linux and Windows, for instance, are poor at multithreading.

Yen says that Sun is now ahead of the game because its rivals' chips are much larger and more complex. It's harder to put lots of such processors on one chip, and harder still to make them run multiple threads. By 2005, Intel may only be running two or four threads, based on its current plans.

All at once

Kohn argues that server tasks often depend more on how much work can be done simultaneously. An example is a computer that serves Web pages to Internet users. Each time a customer logs on to a Web site, a thread is sent to a processor to send Web page data. Those customer requests can be processed in parallel much faster if a computer system processes lots of threads at once.

To some degree, multithreading is becoming more and more fashionable. IBM is using it in its new cell microprocessors for Sony's PlayStation 3. Most new network processors, including one from Intel, are using it for communications processing tasks. Advanced Micro Devices says it will use chip multithreading as it becomes practical in its server processors.

``Multithreading is the next big wave,'' said David Fotland, a former Hewlett-Packard microprocesor architect and now chief technology officer at Ubicom, a chip maker that is using multithreading in its microprocessor for wireless networking tasks. ``It's going to happen everywhere.''

If threads really are so good for server applications, Intel and IBM say they will be able to respond. Intel already has two threads running on its Pentium 4 chips and it has 128 threads running on its network processors. But those network processors are running specialized software, and it will take some time to switch gears for servers.

``We believe we don't need to pull the trigger sooner because we are already leading in industry performance,'' said Nimish Modi, general manager of Intel's enterprise processor division.

Kohn believes that other factors, like better power consumption, will force the adoption of multithreading. He also notes that stamping out small processors on a chip will simplify design, which is becoming risky with growing complexity. Sun can design just one processor and replicate it automatically across the chip.

Sounds simple, but Sun needs to catch up now. Intel is launching its third Itanium chip this summer and IBM is launching its Power 5 chips next year. Meanwhile, Sun is launching UltraSparc IV, which has two processors on one chip, later this year. As an insurance policy, Sun is extending the UltraSparc line in case customers want meaty fat-thread processors.

``It's hard to get a jump on Intel,'' said Linley Gwennap, an analyst at the Linley Group in Mountain View. ``Intel can spend money to catch up. Since Intel has the technology today, it's hard to see how far ahead Sun is.''
 
london-boy said:
would it not be wiser to just buy different batteries depending on your desires? i mean a normal player would only need a battery that can last like 6-8 hours maximum. a more hardcore gamer would buy a (more expensive) battery that can last to up to, i don't know, 14 hours (who actually plays for 14 hours straight is beyond me)... and the batteries kinda go shitty after months, just like cellphones batteries, so u'd need to change batteries. no need to change the whole controller....

I don't really know about battery life of the wireless controllers, I have 2 of them (WaveBird w/o vibration, and Logitec PS2 with vibration), their batteries have not been replaced since I bought them (quite long ago), and I had replaced my the batteries of wireless Blue optical MS mouse twice already.

BTW, the Logitec wireless controller is big and stupid IMHO, nothing compares to the WaveBird (except no vibration).
 
It is a pity AMD isnt getting on board, x86-64 is probably a better instruction set for SMT than either Itanium with its huge register set or Sparc with its register windows.
 
Yen's architects believe that memory latency, or the delay that results when a fast processor has to stop what it's doing to fetch data from a slow memory chip, is the main bottleneck in today's servers. Server processors have become like a Ferrari engine that runs at 150 mph but can't get enough gas to keep running.

To tackle this problem, Sun is designing chips that, when they debut in 2005, will have four processors that each handle four threads, or the subprograms that can be executed independently. This way, whenever a processor stalls because it has to fetch data, it moves from one thread to another.

``Memory has been falling behind for a long time,'' said Yen. ``Rather than fight it, we're learning to deal with it. It's a fundamental change of mind.''

And then Intel and IBM pack lots of low latency SRAM and high bandwidth e-DRAM ( Intel is pushing SRAM more while Cell pushes e-DRAM more ) and take advantage of fat threads and have dealt with the main RAM speed bottleneck solution :) ( sure in order to build a nice hierarchy mainRAM will keep speeding up, but processors will be LESS bottlenecked by the slow pace of external RAM progress ).

Nice to see they mention PlayStation 3 :)
 
Mfa... why is Itanium bad for SMT ( beside being an in-order issue and execute machine ? [except with LOADs/STOREs] ) due to the register file ?

The Alpha EV8 was supposed to have MANY more registers Itanium 2...
 
It is a pity AMD isnt getting on board, x86-64 is probably a better instruction set for SMT than either Itanium with its huge register set or Sparc with its register windows.

Last I heard AMD was going for CMP. The thing is whether AMD has enough resources to make sure the Hammer can keep up with the P4 and soon the P5, and at the same time make the K8 and get enough R&D done for SMT on a per processor basis.

SMT isn't trivial so we'll see -- directed at those not in the know. Hopefully, AMD can get some nice sales with their Opterons and use that money to get SMT, so long as they keep that under wraps as much as possible, people won't go into lets wait for that mode. Which is what is happening with Athlons and A64s.

A 2 core, 8 thread per core A64 would rock. Of course, that'd be an Opteron, before anything else. Not to mention a very expensive Opteron.

Mfa... why is Itanium bad for SMT ( beside being an in-order issue and execute machine ? [except with LOADs/STOREs] ) due to the register file ?

The Alpha EV8 was supposed to have MANY more registers Itanium 2...

I'm wondering this myself. Last I heard Intel (with the Alpha team) was working on this problem. Supposedly, an improved version of HT was going to be used. I don't know much about the EV8, but how many registers were they thinking of having? Wouldn't this kill clock scaling.
 
The physical register file isnt the issue, the amount of registers exposed by the ISA is ... the physical register file for the EV8 might be huge, but the Itanium's would have to be moreso when used as a shared resource through SMT.
 
twochips-fig1.gif


From RWT:

The EV8 is an 8 instruction issue wide out-of-order execution superscalar RISC processor that also supports 4 way simultaneous multithreading (SMT). The front end of the EV8 is a 64 KB, 2-way set associative pseudo dual ported instruction cache that supports the fetch of two separate 8 instruction cache lines each cycle. The EV8 branch predictor can predict up to two branches per cycle and the indices of the two instruction cache line fetched may be either sequential or disjoint depending on its decision. The two groups of 8 instructions are buffered (per thread) and merged in the "collapser", a functional block that chooses the 8 out of the 16 fetched instructions on the most likely path of execution, as predicted by the branch logic. These 8 instructions are register renamed and entered in a 128 entry out-of-order instruction issue queue. Each cycle, the queue selects up to eight data-ready entries for dispatch to the 8 integer units, 4 floating point units, 2 load units, and 2 store units that comprise the EV8’s execution resources [1]. As is customary, the issue queue selects the data-ready instructions that have been in the queue the longest. Unlike the EV6 instruction queues, the EV8’s design does not attempt to maintain program order of entries by shifting down instructions to fill vacant entries. Instead instructions are given an age vector when they enter the queue. The age vectors can be combined with a common "bid" vector using simple and fast logic to select the oldest data-ready instructions for issue. This new scheme allows out-of-order issue queues to be built with many more entries than previously possible, yet be capable of faster operation.

Unlike the EV6, the EV8 uses both a common instruction issue queue, and a common physical register file for both integer and FP operations. The EV8 supports 4 SMT thread contexts, each of which have 32 integer and 32 FP registers, for a combined total of 256 architected state general-purpose registers. In addition, the unified register file also contains 256 renaming registers, one for each of 256 possible instructions in flight, for a grand total of 512 registers. The EV8 needs 16 logical read ports and 8 logical write ports in its register file to support the sustained execution of eight instructions per cycle. A 24 port, 512 entry register file is not a nice thing to have sitting on a critical path so the EV8 designers resorted to the time honored solution of replication. The EV8 unified logical register file physically consists of two separate 512 entry, 8 read port and 8 write port physical register files. The overall total of 1024 64-bit registers in the EV8 is equivalent to the entire 8 KB data cache in the first Alpha processor, the EV4 (21064).
 
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