nvidia:rsx complete.

[Nemo80]

1) Using AF over bilinear texture filtering would actually lower fillrate demands because the pixel shaders would take longer and Xenos has dedicated fill bandwidth.

2) The texture cache on Xenos is smaller than on other GPUs, at least that's what that one quirky Japanese engine/game demo concluded. If true, developers would stick with trilinear filtering over AF because they're used to putting everything into one shader instead of multipassing.

3) It is possible for Xenos to be fillrate bound, but it's not too likely AFAIK. If you dedicate every shader to pixel shading, your pixel shaders have to take less than 6 cycles to bottleneck at fillrate. Not many pixel shaders are that small anymore and most draw commands require some shaders for use on vertices. Also, I'm not sure you'd be better off with a more conventional GPU because the ROPs would probably not be 100% utilized for the small shaders we're talking about. This is especially the case with more involved rendering like alpha blending.

Ok, but still why ain't there any AF and unly bilinear filters with visible bandings?

 

[groper]

Ok, but still why ain't there any AF and unly bilinear filters with visible bandings?

Most games for 360 do have 2-4x AF.
IMO , PDZ and Condemned : 4XAF

 

[Inane_Dork]

Ok, but still why ain't there any AF and unly bilinear filters with visible bandings?

I believe I already indicated part of why that is the case: texture cache size. The other part is that Xenos is weighted towards shader ops over memory reads.

Anyway, if the situation is so painfully obvious, it wouldn't be difficult to find several example screens from basically every X360 game. Would you mind grabbing a few? Just post the links, please.

 

[Edge]

Xbox 360: 8,000M texels/sec - 4000M pixels/sec

Thanks for that Megadrive1988. The RSX should only have 16 ROPS, so that makes it 8,800 MPixels.

Here are the revised figures:

Xbox 360:
16 TMU's x 500 MHz = 8,000 MTexels/sec.
8 ROPS x 500 MHz = 4,000 MPixels/sec.

PS3:
24 TMU's x 550 MHz = 13,200 MTexels/sec.
16 ROPS x 550 MHz = 8,800 MPixels/sec.

I really want to know the size of the texture cache per TMU on Xenos???

 

[Karma Police]

I thought Xenos had 16 ROPs..........

 

[DarkRage]

I thought Xenos had 16 ROPs..........

Nop, 8 ROPs.

Keep in mind that resolution is 1280x720.

1280x720x60fps = 55.3 Mpixels/sec

You can see the massive overdraw capability for a current engine, where you are supposed to use long and power shaders, but not hundreds of texturing passes.

 

[Laa-Yosh]

PS3:
24 TMU's x 550 MHz = 13,200 MTexels/sec.
16 ROPS x 550 MHz = 8,800 MPixels/sec.

I hop you realize that there's not enough bandwith to support 8800 Mpixel/sec even if it's only simple 32-bit color writes... and if you add in Z reads + writes, and color reads for alpha blending...
And why do you think it'll have 16 ROPs anyway?

 

[Historia]

Pixel fillrate:

X360 | 0x MSAA | 4.0 billion/s |
X360 | 2x MSAA | 4.0 billion/s |
X360 | 4x MSAA | 4.0 billion/s |

PS3 | 0x MSAA | 8.8 billion/s |
PS3 | 2x MSAA | 4.4 billion/s |
PS3 | 4x MSAA | 2.2 billion/s |

 

[ROG27]

Pixel fillrate:

X360 | 0x MSAA | 4.0 billion/s |
X360 | 2x MSAA | 4.0 billion/s |
X360 | 4x MSAA | 4.0 billion/s |

PS3 | 0x MSAA | 8.8 billion/s |
PS3 | 2x MSAA | 4.4 billion/s |
PS3 | 4x MSAA | 2.2 billion/s |

And how did we arrive at these numbers?

 

[Fafalada]

I hop you realize that there's not enough bandwith to support 8800 Mpixel/sec even if it's only simple 32-bit color writes... and if you add in Z reads + writes, and color reads for alpha blending...

Well if you organize your overdraws (and you'd only ever be able to reach fill like this by overdrawing ad nauseum) into FB cache fitting blocks, you could do it regardless of memory bandwith. I bet I could come up with a test case that uses only one screen worth of bandwith.

Anyway, joking aside, there's very few areas where fillrate like that could be of any use (meaning that the shaders would actually not bottleneck before it). And the two that come to mind first (shadow filling - map or volumes) can actually be subject to very different bandwith considerations - so they could support some pretty high fill numbers.

Whether having all those rops on board just for acceleration of few scenarios like this is a good use of silicon realestate is another matter though... (then again, there was the GS...).

 

[Inane_Dork]

And how did we arrive at these numbers?

Looks like something I said quite a ways back when I wasn't aware that nVidia's latest can do 2x MSAA at full speed.

My saving grace was that I knew the numbers did not tell the whole story.

 

[Historia]

And how did we arrive at these numbers?

In development... NDA

 

[Nesh]

In development... NDA

Under what developer?If its ok to tell ofcourse

 

[one]

Under what developer?If its ok to tell ofcourse

Probably Josh Robinson's NDA

 

[mckmas8808]

In development... NDA

Wouldn't you be breaking your NDA giving those numbers though? I don't get it.

 

[Shifty Geezer]

The thing with NDA is it's only damaging to break if they catch you, same with many a crime (excepting of course moral issues and guilt, but I doubt that applies to devs breaking NDAs!). If Historia is telling the truth and isn't traceable, he/she can break NDAs left, right and centre. NDAs don't stop info leaks (look at XB360 leaks!) but only deter people.

 

[LunchBox]

Pixel fillrate:

X360 | 0x MSAA | 4.0 billion/s |
X360 | 2x MSAA | 4.0 billion/s |
X360 | 4x MSAA | 4.0 billion/s |

PS3 | 0x MSAA | 8.8 billion/s |
PS3 | 2x MSAA | 4.4 billion/s |
PS3 | 4x MSAA | 2.2 billion/s |

Ummm.... that's not how it works... read up on how AA is calculated...

 

[Jawed]

http://www.beyond3d.com/forum/showthread.php?t=27037

Jawed

 

[ROG27]

Never trust some random person claiming to be a developer with one post. If they were an actual developer with some credibility they probably wouldn't be sharing numbers like that anyway.

 

[London Geezer]

Someone under NDA would never dream of giving out numbers like Historia did, then say "i'm under NDA, can't say ". Do you imagine DeanoC or nAo do that?!