jasonjlee said:
Put Simply, what kind of issues are there when moving a design from say, 0.15 to 0.13?
With ati having a chip that seems to be pushing the limits of what people expected of the .15 process in terms of size and speed, does this make the process any easier?
Simply put, a lot of different issues.
In general, most companies do standard cell ASICs, meaning they take the standard proven simple logic gates and RAM bit cell provided by the fab and use that to build all of their complex logic. When your design is based on this, its easy to 'migrate' from one process to another (generally).
When the sims are run, you might find some pieces that fail design rules or timing, and the design needs to be simplified or pipelined, or changed, etc. Generally not.
Doing this also makes metal revs easier in development, since every logic cell is the same, you can reroute logic, etc without having to worry about a needing particular gate, etc.
Custom logic can be denser, something that takes 1000 NANDs for example, which is N transistors, might only 90% of those transistors in custom logic. However, if the design is wrong, its not so easy to fix with a metal fix. Laying out custom logic is also a pain in the ass, since standard cell basically makes a grid out of the gates and custom doesn't. There are lots of backend tools to do the layout for you and standard cell works great for them, not so great for the custom logic.
You can also optimize for speed, power, etc using custom logic, at the expense of flexibility.
Intel has done simple optical shrinks (i.e. making the die smaller by scaling the mask) of the P4 (announced in EE times, I think) successfully. Sometimes you get lucky and sometimes you don't. You definately don't get lucky so often when analog is involved.
So, my guess is "optimized" .15 for the R300 doesn't help it get it any closer to .13. They'd have a lot more design rules to worry about with the custom logic, and no back end synthesiser to help them out with it.
Of course, I'm just a software guy too, who works in the fabless semi industry. I'm sure there's an ASIC guy out there getting ready to school me.