NV-30 problems ?!!

[Guest]

You continue to demonstrate your inability to comprehend the written word.

Where exactly do I state than nforce is having difficulties producing nforce chipset?

Isn't a tape out reserved for new technology? Tape outs are an initial prototype of a future product. For instance the Geforce 4 ti 4600 is not being "taped out" it is in production. Same would go for nforce 2 chipset that is available. These products would have had their initial "tape out" a long time ago, correct me if I am wrong here but it takes more then just a couple of months to develope these products before they hit the market. Again you are forgetting that the NV30 is rumored to be 120 million transistors and it done at the .13micron process requiring potentially many "tape outs" and trouble shooting. I think you are the one showing inability to comprehend *something*.

 

[MDolenc]

The amazement of this incredible perspective must have paralyzed ATi's marketing department, as there was an utter lack of the usual technology white papers, demos and other launch information prior to the release day. Only a week ago, we (the Tom's Hardware reporter team dedicated to this event) weren't even quite sure of what exactly would be launched today, because ATi wasn't able to give us this information. In the last few days before July 17, we were finally buried in new information on an hourly basis, barely able to put all that stuff into the upcoming article.

This is from Tom's Hardware article about Radeon 9700. Now am I the only one thinks that ATI was in a hurry? I mean reference boards are sent (by NVidia at least) to developers and reviewers couple of weeks before new card is actually launched.
Now you can read on Tom's Hardware, that they were receiving data on hourly basis couple of days before launch. Plus most of the reviews reported that they had very little time to test the card. And if we assume that ATI was showing R300 to Annand and a couple of guys from Epic, what do you get? There are very few Radeon 9700 cards if even Epic didn't receive the board yet... And I don't think it was Nvidia...

 

[Guest]

The amazement of this incredible perspective must have paralyzed ATi's marketing department, as there was an utter lack of the usual technology white papers, demos and other launch information prior to the release day. Only a week ago, we (the Tom's Hardware reporter team dedicated to this event) weren't even quite sure of what exactly would be launched today, because ATi wasn't able to give us this information. In the last few days before July 17, we were finally buried in new information on an hourly basis, barely able to put all that stuff into the upcoming article.

This is from Tom's Hardware article about Radeon 9700. Now am I the only one thinks that ATI was in a hurry? I mean reference boards are sent (by NVidia at least) to developers and reviewers couple of weeks before new card is actually launched.
Now you can read on Tom's Hardware, that they were receiving data on hourly basis couple of days before launch. Plus most of the reviews reported that they had very little time to test the card. And if we assume that ATI was showing R300 to Annand and a couple of guys from Epic, what do you get? There are very few Radeon 9700 cards if even Epic didn't receive the board yet... And I don't think it was Nvidia...

Yeah I think that a lot of this info being dispursed so close to the announcement of the Radeon 9700 was an intensional effort to keep competitors in the dark so to speak about ATIs launch and specs. Obviously ATI was in a rush to beat nvidia to the market for a DX9 part. But not only was it a DX 9 part but it also beats whatever nvidia had intended to rival the part with.(EG. The rumored nv28? who knows whatever it was it looks as though it has been put on the back burner so to speak... no fancy driver release no hardware nothing but nforce 2.)

 

[Dave Baumann]

I mean reference boards are sent (by NVidia at least) to developers and reviewers couple of weeks before new card is actually launched.

thats not necessarily always the case - it just depends on what they have/how much they have in relation to when they want to launch it. For instance, GF3 had a paper launch long before most people had hardware - granted a few devs did get prerelease silicon but then so has JC had it for R300. GF4 was a different kettle of fish becuase it was finsished not that long after the GF3 Ti series was launched so they had time to prepare the launch, get driver development underway, get press material (and lauch shows) prepared and pass out developer boards because they could release it until GF3 Ti had its 6 months or it would just kill the GF3 Ti sales.

So although they may be in a hurry I wouldn't say thats an exception or anything out of the ordinary. they have a few months to shine, they need to capitalise on that.

 

[RussSchultz]

The conference call was talking about last quarter's financials. NFORCE2 taped out then, and is in production ramp now (or so we assume since they've announced the product, though maybe they're still doing a metal revs). We can assume the same for NV30 or NV28.

Generally, the fabless company will start 5-10 wafers, but only allow one to go the full run and leave the rest untouched once the transistors are placed (apparently this takes 3-4 weeks, whereas the metal layers take less time 2-3 weeks). This allows them test the product, but still have a stock of wafers that are ready to go for whatever modifications are required.

The term "tape out" is generally only used for the initial time the database of netlists, etc is sent to the fab to make the mask sets. Every other time after that is generally called a "metal rev", because the only thing that changes is one or more of the metal layers (the connecting wires between the transistors). Very rarely is there a full layer change(i.e. throw out the wafers and start new), though even then, I don't think its commonly referred to as a 'tape out'.

Had you listened to the conference call, you would have heard for yourself that the plain english of the statements were not "NV30 had taped out a record number of times", but several statements in a row that was explaining why the engineering costs were so high for the quarter: record number of tape outs, including the NV30 which was in .13. He then went on and whatever statements following made it clear that it was multiple products and re-iterated that .13 is expensive and NV30 was in .13, and it was their fall product.

 

[MDolenc]

thats not necessarily always the case

I know but you will at least get information about the product week or two before launch and not on "hourly basis" a day before launch. I don't know about Anannd but developers (and that's not just Carmack and Sweeney) have complete specs about NV30 for 2 or 3 months now...

 

[Dave Baumann]

Theres a difference between the information a developer gets to what media gets. ATi doesn't really concentrate on the media much at all (unlike NVIDIA) so I don't find it surprising that the PR didn't have much information to disemminate long before the launch. Of course, it could also be the fact that they would rather have as few leaks as possible as has been mentioned ealier.

 

[Guest]

Additionally, "taping out" is not something you do to a part multiple times.

Yes it is. If there are problems with the intial "tape out" then it is done agian. You understand? A 120million transistor chip at the .13micron process I believe would require more then one tape out. Comprend? You are assuming that it is a reference to other products that nvidia may have in the works but that there are no references to.

"Maybe NVIDIA has some other products about to come out that we just don't know about." .

On the same hand assume that nvidia would not have to tape out the nv30(a new core.) more then once. Yeah anything you say I am not going to go on and on about this obviously what I am saying is not getting through. Nvidia is likely desperatly working very hard to produce something that outperformes the Radeon 9700 asap, what do you suppose that would be? Seems obvious to me that they had known about the R300 soundly beating their best offering a couple of months ago when Doom3 was showcased. So a logical conclusion to me would be that they are trying to get a working prototype of the NV30 working ASAP via multiple tape outs at .13 micron process. This coupled with Prudentials analyst leave one to conclude that yes indeed nvidia is playing catch up in a big way.

NFORCE2 taped out then, and is in production ramp now (or so we assume since they've announced the product, though maybe they're still doing a metal revs). We can assume the same for NV30 or NV28..

So according to RussSchultz the nv30 is being ramped up for production as we speak...... OMG. Mabey the nv28 is ....but not the nv30. That is just silly. You will be lucky to see the nv30 this year. Granted mabey you will see a paper launch in nov.

 

[Dave Baumann]

Geek - please calm down a bit and start posting some rational arguments rather then ones that have no basis on fact only rumour and FUD.

And Its particularily ammusing to see you attempt to lecture Russ on what tape outs are, given the field that Russ works in. I'll await Russ's reply.

 

[RussSchultz]

Just to be contrarian. I remember pixel tapestry and all of the new radeon features being talked about with lots of white papers way before radeon hardware actually showed up.

 

[jb]

tape out can mean lots of things. Its not ment strictly for new parats. In fact every IC that gets cut and packaged has techincally taped out. I am wondering if they are going to use a different packaging scheme.

 

[Evildeus]

Geek_2002,

I think i agree with Russ, would should READ his posts.

He said that the NV30 has been tapped out, not that it won't need any other review.

He said that the NF2 has been tapped out before the CEO speech, he didn't say how much review there had been.

So, it's not because a chip is tapped out that it will go in production 2 months after, but it can be. and it's not because NF2 had been produced in the right way at the first time that the NV30 is going to be the same way, and it's not because the NF2 has been tapped out 50 times that the NV30 won't in the first time. There's no point disccussing different process on quite different product.

PS: Just exemples, i don't know where the truth is

 

[Tahir2]

I just noticed DaveBaumann has all 5 pips filled in now. And over a thousand posts. That's like twice as many as most other regular posters (e.g. Pascal). Wooo......!!!

There is no information on delays to NV30 from the horses mouth.

NV30 may be delayed to next year but then again it may not.

Thats about 'end of subject' on that really.

 

[Guest]

I was under the impression that the term "tape out" refered to revisions of the wafer.... man! I think I will go crawl under a rock somewhere and..... just stay there for a while. [action]slouches, hanges head walks away[/action] 8)

 

[Joe DeFuria]

Just to be contrarian. I remember pixel tapestry and all of the new radeon features being talked about with lots of white papers way before radeon hardware actually showed up.

Right....and that's arguably because ATI knew they had nothing to directly compete with the GeForce3 / GeForce3 Ti until about 6 months after the GeForce3 Ti Launch....

 

[Dave Baumann]

Pixel Tapestry was Radeon (1) GF2 to GF2 Ultra Timeframe. But, then, none of the PR people I knew about then are ones that I've heard of now.

 

[RussSchultz]

Well, technically, you're right. A "tapeout" is any time you send the database to the fab. (The same physical thing happens...somebody FTPs a netlist to the fab)

However, if anybody around here talks about a tapeout, its a new product. Here, we have kegs at 'tapeout' parties. We don't have them for metal revs. You might hear somebody saying "is the metal rev ready for tapeout", "has the metal rev taped out?", but generally, its 'has the database been sent'. However, you'll never hear them say "the part had 3 tapeouts" when what you mean is the part has been rev'd twice. (Though, to be fair, we have had parts "tape out" twice because the first time we sent the database it was in the wrong format. It was corrected the next day and resent. Still we don't say it had two tapeouts).

You'll never hear the CEO at a investors conference call saying "we had a record number of tapeouts" when referring to metal revs. Investors conference calls are all about "good things" and metal revs aren't "good things".

Regardless, even if "tapeout" meant metal rev, if you listen to the conference call, the sentence structure and context clearly indicates several different ideas being expressed in the span of time where record number of tapeouts and NV30 are mentioned. Yes, it did say a record number of tapeouts. Yes, it did say NV30 in .13. No, those two were not connected in such a way to say "NV30 had a record number of tapeouts". Additionally, they were positive about the record number of tapeouts and it was quite obvious it was referring to multiple products.

 

[Guest]

Argh, thanks RussSchultz for the lesson. Hrm I still don't see the nv30 being ramped up for production anytime soon. BTW I have made efforts to listen to that particular CC but nvidia doesn't seem to keep records of their CC for any extended period.

http://www.corporate-ir.net/ireye/ir_site.zhtml?ticker=NVDA&script=1100

Also I have never had as detailed explanation of the fab process.(eg. metal revs etc.) so thanks again. If it is any sort of consolation I feel rather embarrassed.(Thanks for the "technically" being right thingy although my ego is starting to show signs of bruising. )

 

[asicnewbie]

> Well, technically, you're right. A "tapeout" is any time you send the database to the fab.
> (The same physical thing happens...somebody FTPs a netlist to the fab)

At great risk of humiliating myself, I think in this case, NVidia taped out a layout-file (GDSII) instead of a gate netlist. TSMC/UMC don't offer much (or anything) in the way of layout services, and for a design of the NV30's complexity, NVidia most certainly handled all aspects of design up to the complete die layout (transistor sizing and placement, interconnect routing, etc.)

Other foundries (like TI, NEC, IBM, LSI, etc.) offer full 'back-end' services. As a customer, you would 'hand-off' a gate-netlist (a logical representation of your design, in terms of boolean functions AND/OR/XOR/NOT/etc.) Then the foundry would carry the design the rest of the way (conversion of gates into transistors layout, place/route, design-rule-check, etc.)

The trade-off for the customer is the following: In theory, customer pays higher price per fabbed die, in exchange for the foundry to handle more of the design-process's "physical issues" (layout, LVS/DRC, design-for-test and manufacturing test, etc.). In practice, many foundries fall short of this ideal. Sometimes the foundry's backend services are overbooked, and the layout-procedure ends up taking several months (instead of weeks). For *severe* physical problems (like one signal having to drive too many loads, becomes a critical path and causes the design to fail clock-frequency goal), the foundry can't resolve by itself, because they require a design-change in the original netlist. Thus, the foundry has no choice but to throw the ball back into the customer's court, and the back/forth takes time.

A coworker told me that the word 'tapeout' historically refers to the creation of a UNIX tar file, which was physically stored on a magnetic tape. Then the magnetic tape was shipped to the foundry. RussSchultz, is this explanation consistent with your experience?

 

[RussSchultz]

Then the magnetic tape was shipped to the foundry. RussSchultz, is this explanation consistent with your experience?

Thats the explaination I was given, also.

And you're right about the netlist/layout file distinction.