Next-Gen iPhone & iPhone Nano Speculation

Have any manufacturers ever included some dedicated graphics memory outside of handheld consoles?..im assuming were going to get to that point within the next 18 months or so.
How about either adding some exotic memory or slapping in some high clocked lpddr3 linked up to that duel core memory controller.. that alongside significant higher clocks would surely provide a cost effective way to match performance to that new screen.

Nokia N8, C7, E7 etc have 32MB dedicated graphics memory. Newer models like Nokia 701 have 128MB dedicated.
 
I do think bandwidth requirements are not a huge concern, and I find Vita's decision for external VRAM puzzling. Even huge resolutions like 2560x1536x32bpp only need 900MB/s to update at 60Hz. Most mobile GPUs are tilers (save Tegra, which has a color cache that you could probably coerce into software tiling with) that can usually get away with writing the whole framebuffer once per frame, then have it read once per frame to be sent to the screen. Of course they then need bandwidth for textures, but this can be a lot less thanks to compression. Shared memory bandwidth should be able to scale well enough to handle this.

How does this color cache work? Does it attempt to store the entire fb on chip? Or is it used as a giant ROP cache? Does it cycle over geometry multiple times to render tiles of fb, one tile at a time? Can you share any details on this?
 
Nokia N8, C7, E7 etc have 32MB dedicated graphics memory. Newer models like Nokia 701 have 128MB dedicated.

Well that has surprised me, i was under the impression that Nokia had very poor processing prioritys, 128mb dedicated is impressive, ive checked the gl benchmark and even the n8 outperforms an iphone 4, the 701 obliterates it http://www.glbenchmark.com/compare.jsp
I presume both the 701 and the n8 both use the same broadcomm chip. Does the improvement seen between them prove that the extra dedicated graphics does improve things substantially?.
If Apple was to do something similar, with higher clocks i think it would be worthwhile.

Then it could keep to its 'tic toc' strategy of only a complete redesign every 2 generations. with just a node shrink/clock bump inbetween.
 
Well that has surprised me, i was under the impression that Nokia had very poor processing prioritys, 128mb dedicated is impressive, ive checked the gl benchmark and even the n8 outperforms an iphone 4, the 701 obliterates it http://www.glbenchmark.com/compare.jsp


Difference in benchmark performance is due to V1.1 being very poor for doing phone comparisons. Iphone4 has much higher pixel count screen than the nokias. Also Iphone4 is locked to a max of 60fps in those tests.

Better to use 2.1 tests that have some frame-unlocked tests and tests that are normalised at 720p, but the nokia's have no test data under that benchmark.
 
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Entropy,

My point was rather that it would make more sense for Apple's so far strategy to have a finer balance between CPU and GPU processing power, or else a config that wouldn't leave the system either CPU or GPU bound. It goes without saying that the newer the architecture, the better it would be for both sides but availability of specific IP unfortunately plays a role too as Arun said.

And no I don't agree that a quad A9 would be somewhat redundant or "overkill" in a case scenario where it would be theoretically too early for anything A15 and you wouldn't want to increase in a dual A9 case the living shit out of its frequency to reach performance target N. Same goes for the GPU block too. There's a quite a bit of pressure from all the competing sides and I don't think Apple has the luxury at this stage to lean back and go just for a quick direct shrink and call it a day; definitely not if they're aiming for a super high resolution.

Arun,

I'm not familiar with Apple's plans, but given their iOS the reasons why they'd want something like a 544 or 554 don't seem all that clear to me. If they're going for a higher GPU core count one of the good reasons would be N times more fill-rate. 554MPx would give a crapload of more FLOPs, but not more fill-rate. Neither 544 nor 554 can be smaller in die area than a 543; I'd personally invest that die area difference in higher frequencies, but that's just me.
I agree that it would seem unlikely that Apple would just process shrink the A5 without taking the opportunity to improve its capabilities. I'd also tend to agree that (if we assume four times the number of pixels) fill rate improvements would take precedence over ALU capabilities this time around, and lets not forget that simply increasing the number of 543s would bring ALU improvements proportional to fillrate improvements compared to the A5 anyway, so it's not as if the increased fillrate would be at the expense of FLOPs/pixel.

What I'm more specifically fishing after is, again, the memory subsystem. In terms of cacheing, increasing L2 seems a given, but what will happen to the memory interface? Since the last time I checked more thoroughly, LPDDR3 seems to have become a viable alternative, as well as possibly Wide IO mobile, along with the previous contenders. So there are 3+ alternatives giving the same 12.8GB/s nominal bandwidth assuming 64-bit wide memory interface where applicable. Of course, staying with what they have already got (which is best in class as is) is also a possibility, but increased ALU resources needs feeding.

Of course, there are dark horses, such as separate pools of memory for graphics, improved interfaces both to the WiFi circuitry, and of the 30-pin connector. The thunderbolt documents pertaining to mobile devices are particularly interesting in that respect.

Both you and Arun seem to feel that both the A15, as well as the Rogue IP, is too new to be incorporated, but do we really know that, or is that simply based on earlier average time to market experiences? And is there anything that precludes Apple being well aware of the for instance ImgTech IP long before even its existence is announced to the public? I'd assume that they were in a position to evaluate it well in advance. What I'm trying to say here is that if you have sufficient lead time, and a sufficiently quick design team, you'd be limited by process availability rather than IP availability, in which case Apple would be able to incorporate any IP that would suit the 32/28 nm processes they have as options. Is that really an unlikely scenario?
 
Looks like other tablets will beat iPad to the punch with HD or greater than HD resolution tablets.

Besides the rumored Samsung high resolution tablet, Acer is apparently going to introduce a 1900x1200 Iconia at CES.

Should be interesting to see what drives these displays.
 
And is there anything that precludes Apple being well aware of the for instance ImgTech IP long before even its existence is announced to the public? I'd assume that they were in a position to evaluate it well in advance.
Apple is a major owner of ImgTech in addition to a major customer so I'd assume that puts them in an advantageous position to access new IP.

Besides the rumored Samsung high resolution tablet, Acer is apparently going to introduce a 1900x1200 Iconia at CES.

Should be interesting to see what drives these displays.
http://www.anandtech.com/show/5317/acer-unveils-aspire-s5-timeline-ultra-and-acercloud-at-ces

Speaking of tablets, Acer teased though they did not formally announce their latest tablet, the Acer Iconia Tab A700. Thoroughly leaked late last year, the new slate is no less surprising for its 1920 x 1080 10.1" display, the first of what we expect to be several such Android tablets. Though nowhere near Retina Display caliber, the 218 ppi pixel density easily bests other Android tablets. Powered by NVIDIA's Tegra 3 quad-core SoC, clocked at 1.3 GHz, and running Android 4.0, the tablet should give stark competition to Asus Transformer Prime. We'll have to wait to sometime in Q2 2012 to see who comes out on top.
Looks like Tegra 3 at the same clock speeds as the Transformer Prime so more pixels without more performance.
 
How does this color cache work? Does it attempt to store the entire fb on chip? Or is it used as a giant ROP cache? Does it cycle over geometry multiple times to render tiles of fb, one tile at a time? Can you share any details on this?

http://www.nvidia.com/content/PDF/t...ing_High-End_Graphics_to_Handheld_Devices.pdf

"The pixel cache is used to store on-chip Z and color values of pixels and can be reused for all
pixels that are accessed repeatedly, such as User Interface components. Also, due to good
spatial and temporal locality of pixel color and depth data in many other graphics scene
images, pixel caches deliver good cache hit ratios and lower the need to acces s system
memory for data."

Naturally an on-chip cache is not going to be framebuffer sized and is probably in the dozens or maybe low hundreds of kb. I recall some nVidia slides claimed a 50% hit rate for some UI rendering.. who knows if nVidia gamed this at all. There's no tiling in the hardware and I doubt there is in the drivers, but if the software manually tiles I'm sure the pixel cache will be more effective.
 
Entropy,

I'd dare to say that Apple's problem is more related to manufacturing processes than anything else. Lord knows with their quantities they're dealing how long before each hard lauch they're stock piling SoCs.

One more aspect would be that Apple so far designs only one single SoC that serves both tablets and smart-phones per year. If you glance over to TI and its OMAP4/5 families as an example from late 2011 to late 2012:

OMAP4430 = 2*A9@up to 1.2GHz
OMAP4460 = 2*A9@up to 1.5GHz
OMAP4470 = 2*A9@up to 1.8GHz
OMAP5xxx = 2*A15@up to 2.0GHz

....and who knows how many 5xxx variants will make it within 2012 past the initial one.

Only if Apple would decide to shrink its design cycles and/or develop more than 1 SoC/year their current policy could change significantly. I don't see much reason for it for the time being, but then again you never know with Apple.

***edit: and no I'm not contradicting myself, as I probably should had been clearer in my former post. There are way too many factors that probably play a role and I'm still convinced that it would be a rather awkward idea to go with something like A15's and a Rogue to anything bigger than 28nm. All A15 SoCs I can think of are slated for 28nm and not earlier than H2 2012.
 
Am i right in thinking that samsungs 32nm HK process is equal to TSMCs 28nm SOI process?
Samsung is launching its Cortex A-15 based Exynos 5250 early 2H 2012 on this process.

Is is possible then, that the above comments about Apple getting designs early, and samsung that manufactures both, that Apple could spring a suprise?

I don't think so, but i wouldn't put it beyond the realms of possibility.
However Im sticking with same layout, with higher clocks allround, with the same memory from the Exynos 5250. -duel channel lpddr3 12.8gb/s
-ill throw an joker card in the mix and say some dedicated v ram.

Thats as sexy as its gonna get.:LOL:
 
Apple pushed back the launch of the 4S significantly later than a typical iPhone launch. If they carry the trend over to iPad 3, it could be possible to squeeze in a Rogue*4 + A15*4 by maybe October (maybe Apple will even finish their custom ARMv7 variant).

Of course Apple won't wait that long, so that's why A6 should end up as 543MP4@400+MHz + A9*4@1.5GHz on Samsung's 32nm process.
 
Only if Apple would decide to shrink its design cycles and/or develop more than 1 SoC/year their current policy could change significantly. I don't see much reason for it for the time being, but then again you never know with Apple.
If Apple does go quad core CPU + quad core GPU, presumably they are going to have an inventory of partially defective chips. The iPad and iPhone are going to need full chips for competitiveness, but the next iPod Touch could presumably make do with spec reduced, fused off parts. A quad core Apple A6 disabled to dual core CPU and dual core GPU would look much like an Apple A5, but presumably would have battery life benefits from being 32nm, additional clock speed room, and make use of chips that would otherwise be thrown away. I don't suppose a triple core CPU configuration is easy to support? I'm guessing PowerVR doesn't support a MP3 configuration?

Making use of defective parts gives Apple more configuration flexibility while maintaining the 1 SoC/year development cycle. The iPod Touch is probably the lower volume platform compared to the iPad and iPhone which should reduce concerns that they'll need to disable many good chips just to supply the Touch as yields improve.
 
We do support MP3, and three CPU cores is doable too (but poses kernel/scheduler issues of its own). I like your idea, I'm just not sure yeilds and die size/cost make it something that mobile chip vendors might want to pursue. The general idea of reusing defective chips is easier when your chip is bigger, because you also need to build logic into the chip to make it possible, and that's also wasted area if yeilds are good enough.
 
I'd dare to say that Apple's problem is more related to manufacturing processes than anything else. Lord knows with their quantities they're dealing how long before each hard lauch they're stock piling SoCs.

Good point about the need to generate a substantial amount of SoCs before launch day - Apple seems to like to be able to capitalize on pent up interest. It should be noted though, that they will introduce their new SoC on the iPad, and that production volumes/yields will have room to increase in preparation for iPhone and eventually iPod release. Still, we should be talking some 5 million chips or so before launch day. It is difficult to say mow much this represents in production time though if we don't know how large a portion of a given fabs capacity is dedicated to producing the chips. Samsungs Texas fab seemed to be pretty much dedicated to production for Apple for instance (!) in the PR surrounding it.

french toast said:
i think Tegra 3 already uses 32 bit Lpdd3 @500
That's what makes the question interesting - there are several apparently viable ways to go forward, so will we see a convergence so quick that the alternatives never reach the market? Or will we see different approaches actually compete in the market place? Personally I'd prefer the latter, as it would help drive development, and lack of standardization isn't much of a problem for consumers, as they can't reconfigure the memory of their devices in any case. Let 'em slug it out, I say, but lack the connections/insight to say if that is actually what is going to take place.
 
So TI just showed working silicon of A15 on 28nm even though they don't expect to ship OMAP5 before the end of the year. I guess it can't be too surprising if Sammy plans to ship early H2.
 
So TI just showed working silicon of A15 on 28nm even though they don't expect to ship OMAP5 before the end of the year. I guess it can't be too surprising if Sammy plans to ship early H2.

I wouldn't at all be suprised to see the samsung galaxy s3 turn up a MWC with that SOC.
 
I wouldn't at all be suprised to see the samsung galaxy s3 turn up a MWC with that SOC.

TI has only just started shipping 4460, and hasn't even started 4470. There is no way Omap5 anytime soon. If Omap5 was ready that early, they would not have needed the stop-gap 4470, which is clearly aimed at Windows 8

http://www.anandtech.com/show/5406/ti-shows-off-omap-5-arm-cortex-a15-at-ces

"The first devices based on OMAP 5 aren't expected to ship until early 2013, with some aggressive customers potentially shipping at the very end of this year"

I note that anand says of the demo omap5 "Target clocks for the A15s are up to 2GHz, although the chip is currently running at ~1GHz and SGX 544 at ~300MHz since it just came back from the fab."

Which suggest the dualcore 544 will run significantly higher that 300MHZ.
 
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