Next-Gen iPhone & iPhone Nano Speculation

Could be, or I wonder are they targeting the one soc for iPad as well, and hence have an G6400 running low clock here, with uprated clocks for the GPU and CPU on the iPad.

A6X vs A6 double the memory interface, so it's not as easy as just increasing clocks.
 
A6X vs A6 double the memory interface, so it's not as easy as just increasing clocks.

I understand that was a difference between A6X and A6, and that it was primary to provide wider access for the higher res screen, so I guess it would be far too redundant to have that in smartphone soc.
 
It can't be SGX, apple specifically cited GLes3.0 compliance in their presentation.



Could be, or I wonder are they targeting the one soc for iPad as well, and hence have an G6400 running low clock here, with uprated clocks for the GPU and CPU on the iPad.

You're right about the Apple's support of OpenGL ES 3.0, missed that.

Isn't the die area of Apple's A7 102 mm2, seems a bit small for a G6400, especially as the new 64-bit CPU may be larger than the old Swift V1 cores, especially with 'only' a probable half-node process shrink, unless Rogue is tiny. The A6X was calculated at 124 mm2, for reference @ 32nm.
 
You're right about the Apple's support of OpenGL ES 3.0, missed that.

Isn't the die area of Apple's A7 102 mm2, seems a bit small for a G6400, especially as the new 64-bit CPU may be larger than the old Swift V1 cores, especially with 'only' a probable half-node process shrink, unless Rogue is tiny. The A6X was calculated at 124 mm2, for reference @ 32nm.

102 mm^2 but double the transistors according to Schiller. That suggests 28nm and a move to TSMC. That's a crazy density increase otherwise. They did a lot of custom work with the analog circuitry on the single core (non harvested) A5 in the AppleTV to get it about 50% smaller, but that was missing a whole A5 core too, and the A5 was their biggest non-X part yet.
 
102 mm^2 but double the transistors according to Schiller. That suggests 28nm and a move to TSMC. That's a crazy density increase otherwise.

Samsung have a very nice 28nm HKMG process as well, I don't think TSMC get Apple's business until next year @20nm, could be wrong, but I'm sure the A7 is fabbed by Samsung
 
That is also possible, but isn't it more likely the other way round. Why would apple give IMG the rights to use an apple designed extension in generic drivers ?More like IMG did it initially for apple, and then made it generic ?
It could be been part of the agreement where IMG gives Apple broad access to PVRTC in exchange for reciprocal use of any improvements Apple makes. IMG doing the improvements for Apple also makes sense too.

I haven't seen anything to suggest who did the customisation ?, but maybe it is generally known it was Sony ?
http://www.gamesindustry.biz/articles/digitalfoundry-powervr-tech-interview

Q: Out of interest, Sony says that it has a PowerVR SGX543 MP4+ inside Sony NGP... what does the plus stand for?

IMG: That's to indicate the work Sony has done to implement the graphics. What they licensed is a SGX543 MP4.
IMG said they only provided a stock SGX543MP4 to Sony and gives Sony credit for the customization work. This type of arrangement where they can take a stock GPU and modify it at will, perhaps for tighter integration with their custom CPU, would probably appeal to Apple. Apple did hired a bunch of AMD graphics engineers for it's Orlando design center earlier this year although they would have been too late to really contribute to the A7.

We know apple said its opengles3.0. We know it supports PVRTC (as it has to, to be compatible with all the preexisting apps) . The most simple answer is that it is Rogue. There are other possibilities, but they are more contrived IMO.
I would agree.
 

Thanks for reminding me about that. I do recall seeing that article at the time, but totally forgot about that specific piece of info.

IMG said they only provided a stock SGX543MP4 to Sony and gives Sony credit for the customization work. This type of arrangement where they can take a stock GPU and modify it at will, perhaps for tighter integration with their custom CPU, would probably appeal to Apple. Apple did hired a bunch of AMD graphics engineers for it's Orlando design center earlier this year although they would have been too late to really contribute to the A7.
It definitely would appeal to Aplle.
 
Samsung have a very nice 28nm HKMG process as well, I don't think TSMC get Apple's business until next year @20nm, could be wrong, but I'm sure the A7 is fabbed by Samsung

There is some potential doubt.

http://www.macrumors.com/2013/06/24/apples-prototype-iphone-5s-based-on-new-a7-chip/

Another item of interest on the main chip is a K1A0062 identifier. We spoke with Dick James and Jim Morrison of chip teardown firm Chipworks, and they pointed out that in previous chips this number has typically started with an "N" and referred to a Samsung part number on the die. They wonder whether this new "K" identifier could indicate that the chip is being made by TSMC instead of Samsung. A transition from Samsung to TSMC has long been rumored, although the latest rumors indicate that the move will be made with the A8 chip rather than the A7.
 
Samsung have a very nice 28nm HKMG process as well, I don't think TSMC get Apple's business until next year @20nm, could be wrong, but I'm sure the A7 is fabbed by Samsung

You think Samsung's 28nm allowed them to do a chip with nearly twice the density as the 32nm A6? For comparison, scaling the A5 from Samsung's 45nm to their 32nm node yielded a chip about 58% the original size, so this would be an even bigger density improvement from what's only a half node change in designation. And note that Samsung's 28nm is basically a tweak to their 32nm, with the same basic tool flow and all that.

Some people are saying that A7 is a lot denser because it's proportionately more GPU and GPU is denser, but I doubt this because higher end Series 6 is supposed to be more area efficient than Series5XT - which is what you'd expect because they don't eat the area inefficiency cost of stacking together separate cores. Since they "only" get 2x the GPU performance and since I suspect part of that would be due to a clock boost I don't expect there'd be substantially more than 2x the GPU transistors used, even accounting for the extra space needed for new features.

It could be that they're getting higher average density due to being proportionately more SRAM instead, ie more than 2MB of L2 cache or some other big SRAM area, but this would seem rather unfitting too. Maybe if for some special purpose.

My bet right now is on TSMC's 28nm simply being that much denser than Samsung's 28nm.
 
That article was a good find.

It noted that it was odd for Apple to spend engineering effort to redesign the A5 for the Apple TV and that the A5 was overly shrunk considering what was removed. Maybe the chip was simply a practice run for something else, something bigger?
 
That link says that the reduced A5 still has an SGX543MP2, but that looks clearly wrong by comparing die shots. It does appear to still have the "Hydra" block though (which is the part they label "GPU" and is probably the source of the confused comment). Also looks like there's less L2 cache, with the L2 tags rearranged closer to the L2 data arrays (so we could be looking at only 256KB). It's clearly missing quite a bit of other logic blocks, but not stuff that appears to be analog - although the transceivers and stuff don't really look the same so that could have been changed, which makes sense since a TV chip doesn't need the same interfaces a phone or tablet needs (doesn't even need an LCD controller). I don't think there's an indication here that the density is better, it's just missing things.
 
That link says that the reduced A5 still has an SGX543MP2, but that looks clearly wrong by comparing die shots. It does appear to still have the "Hydra" block though (which is the part they label "GPU" and is probably the source of the confused comment). Also looks like there's less L2 cache, with the L2 tags rearranged closer to the L2 data arrays (so we could be looking at only 256KB). It's clearly missing quite a bit of other logic blocks, but not stuff that appears to be analog - although the transceivers and stuff don't really look the same so that could have been changed, which makes sense since a TV chip doesn't need the same interfaces a phone or tablet needs (doesn't even need an LCD controller). I don't think there's an indication here that the density is better, it's just missing things.

Good points. I see what you are saying now. In the A5 shot here: the GPU cores are top left to the left and right of the "Hydra" block.

You can clearly see the cache is smaller because the CPU cores are elongated rectangles (vertical) compared to the more square CPU in the top right on the single core A5 in the article mentioned.

Also looks like the PLLs are more tightly grouped on the dual core A5, for whatever reason. I don't recognize any of the other blocks except the SDRAM interface though.

Am I seeing both of those right?
 
Good points. I see what you are saying now. In the A5 shot here: the GPU cores are top left to the left and right of the "Hydra" block.

You can clearly see the cache is smaller because the CPU cores are elongated rectangles (vertical) compared to the more square CPU in the top right on the single core A5 in the article mentioned.

Also looks like the PLLs are more tightly grouped on the dual core A5, for whatever reason. I don't recognize any of the other blocks except the SDRAM interface though.

Am I seeing both of those right?

Yeah, that all looks right. So, only one A9 core, only half of the GPU (but still has the Hydra block), only 256KB instead of 1MB of L2 cache, other logic blocks clearly gone (an image signal processor would be on the chopping block, as well as the part of the display controller that needs to output to an LCD rather than HDMI), no longer needs enough interfaces to support camera or phone modem, could scrap touch screen controller if that was integrated on the SoC (if not then at least the interface), one of the memory controllers is probably gone, may also have simpler clock and power input requirements since power management isn't vital..

There is ethernet though, I wonder if that's integrated here or not.
 
Yeah, that all looks right. So, only one A9 core, only half of the GPU (but still has the Hydra block), only 256KB instead of 1MB of L2 cache, other logic blocks clearly gone (an image signal processor would be on the chopping block, as well as the part of the display controller that needs to output to an LCD rather than HDMI), no longer needs enough interfaces to support camera or phone modem, could scrap touch screen controller if that was integrated on the SoC (if not then at least the interface), one of the memory controllers is probably gone, may also have simpler clock and power input requirements since power management isn't vital..

There is ethernet though, I wonder if that's integrated here or not.

Can you elaborate on the "Hydra" block? I don't see it referenced elsewhere.
 
Do you mean, give a reference for it? Sorry, I don't think it's really been disclosed.. just mentioned informally here once or twice. So it's really just a guess that that's what it is, but it does fit. Whatever the case, it's something that there's only one of in the full A5, that the two GPU are sandwiched around, so you'd figure it's some shared GPU block.
 
Do you mean, give a reference for it? Sorry, I don't think it's really been disclosed.. just mentioned informally here once or twice. So it's really just a guess that that's what it is, but it does fit. Whatever the case, it's something that there's only one of in the full A5, that the two GPU are sandwiched around, so you'd figure it's some shared GPU block.

Fair enough. One last question. What is the block on the top left of the single core A5 that's duplicated that there's only one of on the dual core A5 in the bottom right?
 
Fair enough. One last question. What is the block on the top left of the single core A5 that's duplicated that there's only one of on the dual core A5 in the bottom right?

No idea :)

(I'm actually not really that great at die detective work, to be honest.. the things I mentioned are things that seem pretty obvious to me)
 
Back
Top