More hits to the heart for the 4 PE's CPU fans (CELL)

He's Yoshio Masubuchi from Toshiba... (Jim Kahle of IBM holding the wafer, the right is Masakazu Suzuoki of SCEI) Bad luck you didn't choose Suzuoki!

 

The rows on the right have an odd number of chips.

 

That's what i've come up with too.

The photo resist is/was applied by dropping it on the center and spinning the wafer.
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I don't think that applying foto resist is one of the more critical steps in the production chain.
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The silicon ingots are cylindrical due to the method used for growning them.

 

some input for those striving to improve their armchair expertise in IC fabrication.

 

90 nm 300mm wafer

160 single core per wafer + strange logic or 80 double core per wafer + strange logic (no one think that it is edram ? ).. ..is a good yeld ?



P4 wafer (300 mm?) 180 cores (130nm)

the P4 at 180 nm was 217mm^2 (55Mtransistor) back in the 2001

the P4 at 130 nm was 131mm^2 (55Mtransistor)


G5 wafer (300 mm?) 175 cores (130nm)

the G5 at 130 nm SOI was 118mm^2 (52Mtransistor)

 

1 EE+GS core(small square)+ 2 cell ?

 

Actually, my armchair is more into software development...

 

Power Efficient Processor Architecture and The Cell Processor
PDF and slides
it's a very good read, it shows how they went down to the high-frequency, single threaded, software driven (in order, branch and dma hints) route with their SPE design.

EDIT: are there any chances to have ISSCC papers?

 

Any chance i can visiting you at work?

 

LOL..yeah..just send your CV

 

Well the electronic versions are not out yet ... but dont you have any account left at unibo?

 

The papers you are searching for, have not been published yet in electronic form and in the first 2 volume of isscc 2005 there no sign about what you are interested in, maybe in march will see something happen.

 

Mmmm...but....is beyond3d in italy?

 

LOL No accounts left, sorry

EHehe..that's an old story, Marco knew how to read IEEE papers through some unibo proxy

 

Didn't Hey69 say he could get some papers or something?

 

please send for me these docs, varga1973@axelero.hu

 

Thanx to nAo

When you get more, pass them right here

 

What's that SW on the PS3* configuration?




* I know....wishfull thinking.

 

Its a switch.

 

Forgive my ignorance, but what's with the dual XDRRAM blocks for each CELL? What's the significance of that?