Does Cell Have Any Other Advantages Over XCPU Other Than FLOPS?

scificube said:
Personally I am trying to see if the claim that Cell could handle multiple OS simultaneously was pure marketing tripe or is there something the consensus here is missing. Without preemptive scheduling via the Kernel I would say most OS have considerable trouble running on an SPU. Without preemptive scheduling I would say one's OS is rather dated or really isn't a serious contender. It is an assumption perhaps wrong but I assume the SPUs were to have hand in this as the PPE alone running multiple OS seems impractical to me given it will also have to handle the wealth of more unpredicably branchy code out there.

I wish to know if the SPU can in fact fully operate indepently or not. OSs to me seem the only realm place true preemptive scheduling is needed so that's where I focus. I admit though...I'm inexperienced so perhaps that's wrong.
Reading the CELL documentation indicates that there is no way for the SPEs to hand interrupts to each other, nor is it possible for any of them to e.g. modify their page tables or supply any kind of local memory protection mechanism - the latter two are showstoppers if you wish to actually run a modern, self-contained OS within an SPE.

Multiple OSes on the CELL is no easier than multiple OSes on an x86; in practice, you would normally just run a single host OS and treat the SPEs as yet another resource that the OS arbitrates access to.
 
That just about wraps that up then. I was reading an article linked in this thread that suggests as much if you read between the lines.
 
Edge said:
I'm commenting on his "doesn't bring anything new or interesting to the market.". The SPE's very much bring something new and interesting to the market.

His comment on "doesn't bring anything new or interesting to the market." was to the RSX not Cell. I think overall, all of his comments are pretty much valid. And as he said, Cell in the PS3 is good for what suppose to do, but looking beyond PS3, he doesn't think the Cell will fair too well.
 
arjan de lumens said:
If you have an idea in advance of what your memory access pattern will look like, you can achieve great performance. Otherwise you are in trouble. The CELL will reward/penalize you in this regard much more than a 'traditional' CPU.

That will be provided to a lot of developers through stream-lined middleware. That one of the main advantages that CELL, in having so much specialized computational ability, will bring forth products that take advantage of it. There are already a number of such products available.

Also many of the GAMING related algorithms lend themselves quite well to stream-lined memory accesses, that why IBM in that article mentioned GAMING.
 
TrungGap said:
His comment on "doesn't bring anything new or interesting to the market." was to the RSX not Cell. I think overall, all of his comments are pretty much valid. And as he said, Cell in the PS3 is good for what suppose to do, but looking beyond PS3, he doesn't think the Cell will fair too well.

I realize it was to RSX, but don't you think CELL is new and interesting? Seems to be a lack of consistency issue here, making things suspect.

Where does he say CELL is good for the PS3? He actually recommends a -MS X360 CPU- like solution over CELL. He is his quote:
The architects and implementors would ideally, in both mine and I'm fairly certain theirs, replicated the PPE as many time as required to get the targetted flops number.

Beyond PS3? Let's not get ahead of ourselves, and keep discussion on the current generation. Who knows what architecture changes will take place with the next consoles.
 
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nAo said:
Nonetheless GPUs power comes at some cost, just like SPEs power.


My point was that specialized hardware has limited utility without a large enough market to sustain development. With the advent of GPGPU programming I would wager that a model that leverages high volume hardware with enough abstraction would be more likely to succeed than a niche product like Cell. What will ultimately be most successful will most likely be the model that achieves the best cost/ benefit ratio accounting for all factors from die - size to programming difficulty.
 
nelg said:
My point was that specialized hardware has limited utility without a large enough market to sustain development. With the advent of GPGPU programming I would wager that a model that leverages high volume hardware with enough abstraction would be more likely to succeed than a niche product like Cell. What will ultimately be most successful will most likely be the model that achieves the best cost/ benefit ratio accounting for all factors from die - size to programming difficulty.

There are many factors, like x86 legacy, and amount of software investment in the current code base that determines if the overall market is interested in a new processor. Also competition's market strength, and continued investments/improvements in their current design. I would say that is much more important, than any perceived weaknesses of CELL's design.

If it was about the best design, x86 would not be the world's dominant CPU architecture.
 
nelg said:
My point was that specialized hardware has limited utility without a large enough market to sustain development. With the advent of GPGPU programming I would wager that a model that leverages high volume hardware with enough abstraction would be more likely to succeed than a niche product like Cell.
I just recently read a report by Jon Peddie on IGPs which pegged the discrete, high-end, graphics market at 25-30M users. The PlayStation2 userbase is approaching 100M users; exactly how is the latter a "niche," yet the former is not?
 
Vince said:
I just recently read a report by Jon Peddie on IGPs which pegged the discrete, high-end, graphics market at 25-30M users. The PlayStation2 userbase is approaching 100M users; exactly how is the latter a "niche," yet the former is not?

PS3 will be using a desktop GPU not a CELL based one...;)
 
PC-Engine said:
PS3 will be using a desktop GPU not a CELL based one...;)

Which makes absolutely no difference in the context of what's stated here; the debate - before you decided to make yet another baseless comment - was about the relative volumes of GPU production verse Cell volume and it's effect on unit cost and it's spill-over effect on userbase and, subsequently development viability. RSX volume out of OTSS and Nagasaki is not going to have an effect on the cost of another "desktop GPU" -- but 100M Cell's for PlayStation3 will have an effect on the cost of producing the 100,000,001 Cell for another task.

Oh, yeah, before I forget... :LOL:;):LOL:
 
Vince said:
Which makes absolutely no difference in the context of what's stated here; the debate - before you decided to make yet another baseless comment - was about the relative volumes of GPU production verse Cell volume and it's effect on unit cost and it's spill-over effect on userbase and, subsequently development viability. RSX volume out of OTSS and Nagasaki is not going to have an effect on the cost of another "desktop GPU" -- but 100M Cell's for PlayStation3 will have an effect on the cost of producing the 100,000,001 Cell for another task.

Oh, yeah, before I forget... :LOL:;):LOL:

And where did the large software development backing behind the EE get it? Where else is the EE being used?

CELL is somehow going to magically be different? Why because SONY and Toshiba are part of STI? :LOL:
 
Vince said:
Which makes absolutely no difference in the context of what's stated here; the debate - before you decided to make yet another baseless comment - was about the relative volumes of GPU production verse Cell volume and it's effect on unit cost and it's spill-over effect on userbase and, subsequently development viability. RSX volume out of OTSS and Nagasaki is not going to have an effect on the cost of another "desktop GPU" -- but 100M Cell's for PlayStation3 will have an effect on the cost of producing the 100,000,001 Cell for another task.

Oh, yeah, before I forget... :LOL:;):LOL:

How many nvidia chips will be made based off the rsx design ?

If its a g70 modified as many believe then you will have alot more of those made than cell.


Lets see for every cell in the ps3 u have one rsx . Then you have the graphics market then u have niche markets .


Where is the cell going to be used outside of the ps3 ? Niche markets at the moment and no real prospects for moving into a secondary market as big as pc graphics .
 
Sony plans to use mini-Cell processors in cell phones, PDAs, etc.

If I remember correctly, for every bad Cell that was produced for PlayStation 3, they are going to use it for an HDTV instead, to save money.

Sony is going to take advantage of Cell's power.
 
scificube said:
The question is whether an SPU can interrupt execution on another SPU and perform a context switch to another thread of execution. From the sound of things HW support for this does not appear to be there.

Please read the publicly available documentation before making blatently incorrect statements .
 
I didn't make a statement. I asked a question and trusted that people would not lie to me or answer if they didn't know for themselves.

I do however apologize if the documents are available to the public and I need only look there for my answers.

I've read a TON of pdfs so it's not like I'm not trying. Would you mind linking me to the documents?

-------------------------

The reason I responded to you is that what you mentioned still seems like a cooperative mechanism not a means for preemption. If a task gives up a core based on an internal time event it would seem not much different than it yielding the core...this is still relying on the task to play nice in the system to me. I'm asking if there is a means to not care if tasks play nice and enforce a scheduling scheme all tasks will be subject to on an SPU(s) by an SPU(s).

http://www-128.ibm.com/developerworks/power/library/pa-fpfunleashing/

" Another option is to load multiple pieces of code and data to a single SPE; this can be the basis of a primitive multitasking environment on the SPE, useful for multiple small jobs which do not need a dedicated processor. You cannot provide memory protection between tasks running on a single SPE, and such multitasking is necessarily cooperative, not preemptive. However, in cases where the tasks are small enough, and complete reliably enough, this can dramatically improve performance, freeing up other SPEs for dedicated tasks. The cost of transferring a small program to the SPE might be too high in some cases, however."

" When all your code and data together cannot be fit entirely within 256KB, you might need to use a "large" model. In this model, the PPE reserves chunks of effective address space for use by the SPE program, which accesses them through DMA. Memory mapping into effective address space is set up to give the SPE a secondary memory store which it can access using the DMA engine (MFC).

You can use this model in many ways. One is the streaming model: load a regular chunk of sequential data, modify it, write it back to main memory, and repeat. Another is to use the local store as a temporary buffer, copying random data back and forth as needed.

In some cases, the same techniques could be used for code, not just data; the primary code loaded on the SPE could use overlay segments located in main memory as-needed. The compiler can generate automatic overlaying code to handle this case. CESOF, and the toolchains in use, allow SPE code to refer to objects defined in the effective address space.

The simple LS-resident multitasking possible on a single SPE becomes somewhat more flexible when combined with automatic loading and storing of job code and data; a small kernel running on the SPE can load tasks, or swap them out when blocked or completed, allowing the SPE to manage multiple tasks from a job queue. Once again, this is still not preemptive."

These quotes are from the article linked to above and comments this affect are what lead me to believe the SPUs are not capable of true preemptive scheduling of tasks. This is an IBM article so I think it's credible but perhaps someone other than me hasn't read the documents yet when writing this ;)

An OS running on the PPE can manage and allocate SPEs, providing and arbitrating access to them. Making the SPEs available like this allows preemptive multitasking of more tasks than there are SPEs to run them. Running tasks or threads can be mapped onto SPEs, paused and copied out, resumed, and so on. Because the context-switch cost is relatively large (the whole 256KB of local store, 128x16B register file, and DMA command queues), a run-to-completion policy is of course strongly favored, but the option of preemption is there. This can allow for memory protection between tasks, because a task will be swapped out completely before another task is loaded on the same SPE.

It would seem only the PPE has the facilities to provide proper memory management and protection between tasks as it's stated the SPUs cannot do this.

So this is what led me to conclude that SPUs cannot independly run an OS's kernel in answer to my question.
 
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