ATI to delay 80nm GPU migration?

Xmas said:
Why would it need an extra clock cycle "by definition"?
An extra pass, then? I assumed it would take at least another clock cycle for the next two samples. Bad assumption?
 
Pete said:
An extra pass, then? I assumed it would take at least another clock cycle for the next two samples. Bad assumption?
I think Xmas means that by definition 4x MSAA means 4 samples. Its definition says nothing about how many cycles it takes to calculate these 4 samples. It could be 1, 2, 4, etc.
 
Ah, so it's merely capable of two samples per clock, but other bottlenecks may exist? Another "loop through the ROP" doesn't translate to precisely one clock cycle, then.

I meant to say that ATI's h/w MSAA, as I understand it from Dave's reviews, can only apply two samples per "loop" through the ROP, so 4x MSAA would require another loop by definition of the architecture in question. I'm probably being very loose with "clock cycle" and "pass." In fact, I'm not even sure if "loop" is synonymous with "pass" in all instances. Sorry about that. Mind setting me straight?
 
This is a wording thing. There is nothing "by definition" of MSAA that states 4x MSAA must take 4 cycles, nor is there anything "by definition" that states an architecture must take 4 cycles, it just happens that all desktop MSAA capable parts at the moment do, apparently, take 2 cycles for 4x MSAA (and this is most likely due to bandwidth constraints).
 
Pete said:
I meant to say that ATI's h/w MSAA, as I understand it from Dave's reviews, can only apply two samples per "loop" through the ROP, so 4x MSAA would require another loop by definition of the architecture in question.
But Dave's X1600XT review shows that R530 has twice as many Z-test units than Color ROPs. And each of these units is able to perform 2 Z-tests when MSAA is enabled.

http://www.beyond3d.com/reviews/ati/rv5xx/index.php?p=07

That gives us the following numbers for pixels per clock.
Code:
	color		z only		z+color
NoAA	4		8		4
2xAA	4		8		4
4xAA	4		4		4
6xAA	4		8/3		8/3
Except for Z-only rendering, 4xAA is theoretically as fast as 2xAA.
The reasons that 4xAA performance is still lower in practice are that higher AA means a bigger framebuffer and therefore more page breaks and less texture memory, higher bandwidth requirements for incompressible tiles, and the above numbers for color are only true for polygon interior pixels.
 
kemosabe said:
More rumblings about TSMC having ongoing issues with 80nm yields. :???:

Yikes. Which, btw, is also a sideways way of confirming that they also think R6xx has been pushed to 2007, as xbit has previously reported.
 
no-X said:
geo: And what if Dave knows the truth and this link was just a hint? :oops:

Always a possibility. I've said it more than once, "Sometimes it is more important to note who is doing the linking than who they are linking. . ." Tho in this case he wouldn't have needed the Reg for a beard; he could have just said "hmm, Digitimes also says ATI denies it".

And the rest of that observation is ". . .but not always, and the skill is in correctly divining the difference." Or something like that. Possibly with a nod to Dr. Freud and his cigars. ;)
 
Xmas said:
But Dave's X1600XT review shows that R530 has twice as many Z-test units than Color ROPs. And each of these units is able to perform 2 Z-tests when MSAA is enabled.
Thanks, it's finally clear to me. So my offending paragraph, even if I'd clarify that "by definition" had an implied "with ATI GPUs" before it, is still considerably wrong:

Pete said:
I doubt RV530 gives us 4xAA at 2xAA speeds. Remember, 4x MSAA by definition requires an extra clock cycle than 2x, another pass through the ROPs (or wherever it is those two samples per clock are hiding), so you're losing some performance right there. I'm sure bandwidth factors in, too. Oh, and to be clear, we're talking about MSAA, not FSAA. MSAA doesn't touch (or at least alter) every pixel in the scene, so I'm not sure I'd call it "full scene/screen" (like straightforward SSAA or the V5's AA).
Heck, even my contention that MSAA is not FSAA is counter to RTR 2/E. Another wording thing. :oops:
 
A new Rumor That Will Not Die*: http://www.theinquirer.net/?article=31492

Computex as originally expected? Err, wasn't there an ATI roadmap floating around in, like, January, that was pointing at August for RV560?

*Btw, when are we going to be able to buy those 32 pipe R520s, anyway?
 
geo said:
Computex as originally expected? Err, wasn't there an ATI roadmap floating around in, like, January, that was pointing at August for RV560?
Not just RV560, but also RV570XL/XT.

That´s just INQ doing another "Oh, wait. We need to fill the void regarding ATI´s new GPUs with something that sounds interesting and new."
 
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