AMD: Volcanic Islands R1100/1200 (8***/9*** series) Speculation/ Rumour Thread

How could such a card compete with Tahiti which would have almost 50% more bandiwdth and is already bandwidth limited?

 

could be just "midrange " gpu, i doubt they will go from a 384bits bus to a 256bits one. Make more sense with the memory config described there too.

 

I hope you're right(seems likely), personally i need a 4GB 9870 or i'll just wait for 20nm.

 

So if I draw all over the quadrant of four whiteboards in my office, can I post it to the world web whatevers and claim my all-ending knowledge?

 

Remember to let a colleague take a photo too, so it can be double-confirmed

 

Using a whiteboard requires less effort than making a fake slide, you also don't need to give much info.

Luckily for tech sites i don't have access to a white board.

 

I believe this can be real, but these configurations don't describe any high-end board, but very likely a 128bit low-end/mainstream (Pitcairn-like) part

 

Because they really are 256 quobits.There is a "q" missing.

 

How many 512-Bit cards have their been?

II remember:

*HD 2900 (2006)
*GTX-280 (2008)
*GXT 285 (2009?)

 

http://en.wikipedia.org/wiki/Matrox_Parhelia

Or is that not what you meant.

 

I was looking at that white board wondering what Zeke meant.
Google finds the Urban Dictionary entry for it which includes
"Zeke
the coolest funniest sweetest person in the world and everyone loves him
zeke's a badass and i wish i was him"

Sounds good, but is that the kind of reference a technical person would make in a meeting.

 

How bandwidth-bound are today's "big" GPUs? Like Titan, for instance? Or, I guess even more importantly, Tahiti?

I'm just curious as to how much of an improvement is possible without a new memory technology. I'm guessing on the AMD side of things, there will be some efficiency improvements, but only so much can be done. There's a wall out there, and eventually it won't matter how high of core clocks, TMUs and shaders you throw at the problem -- bandwidth will always hold things back, so long as it remains stationary.

Basically, what I imagine is that Nvidia and AMD will have to have 512 bit flagships on 20nm, unless higher clocked GDDR5 busses and ICs surface, or unless we get GDDR6 or HBM. Otherwise, performance won't increase nearly as much as one would expect from a full node advancement.

Typically, since GPUs are "embarrassingly parallel," we see improvements being tied to improvements in density at nearly a 1:1 ratio. However, if we don't get an accompanying bandwidth increase, GPUs will be stuck in the mud. Performance per watt will go up, but with the supposed price/transistor staying flat or increasing, and diminishing returns from less-than-adequate bandwidth affecting performance gains, we'll see a pretty a sad 20nm node.

HBM should be ready in time for high end GPUs next year, and AMD is known to be interested in Hynix's stacked memory solution. Nvidia, on the other hand, doesn't have stacked memory on their roadmaps until after Maxwell.

GDDR6 is supposedly going to be out in a similar-ish timeframe, but there's basically been nothing said on it since it hit the rumor mill last year.

So, are we going to hit a wall?

 

I think that's why NVIDIA is looking at stacked RAM for Volta. Intel is doing an embedded RAM for Haswell. I bet AMD planning on doing the same.

It's hard to scale off-chip bandwidth. You're going to end up wasting a ton of power on just moving bits back and forth between chips. So either you have to move more of you data on the chip and maximize you processing there, or reduce the power it takes to move data (interposer/stack of some kind).

I wouldn't expect 20nm to be great either. Even TSMC is only claiming 30% speed increases at the same power so I think most of the gains will have to come from architectural improvements.

 

They're probably ahead of the game, they showed this off 2 years ago

http://sites.amd.com/la/Documents/TFE2011_001AMC.pdf

 

Not counting the ring bus of any GPU.

 

This might be true. They published a lot of papers about stacking DRAM, many written by G. H. Loh.

Also there is that Charlie's 2009 Sea Islands highend - Tiran - with stacked die.
http://abload.de/img/amd_roadmap_tiranh3yej.jpg

 

Then again with all the internal reshuffling of recent years, planned schedules may have been affected.

 

By the way, regarding the thread title: I just a had a quick glance at the re-uploaded ISA manual of Sea Islands, and its description title is R1100_ISA.book, so Volcanic Islands is definitely R1200.

 

Surprisingly few leaks so far.