AMD: Southern Islands (7*** series) Speculation/ Rumour Thread

Discussion in 'Architecture and Products' started by UniversalTruth, Dec 17, 2010.

  1. Man from Atlantis

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    :smile:

    [​IMG]
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    source
     
    #2501 Man from Atlantis, Jan 19, 2012
    Last edited by a moderator: Jan 19, 2012
  2. mczak

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    Yes but with people reportedly running the HD7970 undervolted to about idle voltage (~0.85V) at stock clocks, it should still easily make it to around 1Ghz probably, because I sort of doubt the default voltage is going to be much lower than on HD7970 - a little bit lower maybe but not that much.
     
  3. DarthShader

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  4. AlphaWolf

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    Lots of ppl hit 1.125Ghz on default volts, however have yet to actually see any card slot power consumption numbers. Full system numbers don't give an exact picture because higher cpu utilization can lead to higher use from that part as well.
     
  5. Man from Atlantis

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    :wink:

    it's Idle 14W, Game 210W, Furmark 295W(Powertune +20%) 245W (Powertune @0)

    http://ht4u.net/reviews/2011/amd_radeon_hd_7900_southern_island_test/index22.php
     
  6. AlphaWolf

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    I meant for the 1.125Ghz OC.
     
  7. Man from Atlantis

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  8. Man from Atlantis

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    http://forums.guru3d.com/showthread.php?p=4221583#post4221583
     
  9. Alexko

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    That's a pretty huge amount of variation, isn't it?
     
  10. Rangers

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  11. fellix

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    Looks similar to Cypress that had two selections for Vcc binning (low and high leakage chips).
     
  12. trinibwoy

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  13. silent_guy

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    And here's probably the answer as to why they launched with 925MHz clocks.
     
  14. ECH

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    #2514 ECH, Jan 21, 2012
    Last edited by a moderator: Jan 21, 2012
  15. Man from Atlantis

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    lower leakege chips use more voltages.. higher leakage chips use lower voltage so that it can clock higher..

    1.0250V is high leakege chips and they can be overclocked better..
     
    #2515 Man from Atlantis, Jan 21, 2012
    Last edited by a moderator: Jan 21, 2012
  16. trinibwoy

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    No, lower voltage = lower clocks.
     
  17. Speccy

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    Atlantis is correct. What you can infer from the table is that 1.175 is a safe operating voltage for the process, so if you get a high leakage running at 1.025V you have a lot of voltage headroom to tweak voltage and still be within "normal" voltage bounds for Tahiti. For sure, though, TDP will be a lot higher so you need to make sure the VRM can handle it.
     
  18. trinibwoy

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    Where did you get the impression that high leakage chips were running at a lower voltage? The linked posts by Unwinder clearly say that the lower voltage settings are reserved for lower leakage, higher quality chips.

    Also lower voltage chips do not have higher clock headroom due to a set +125mV OVP. So you actually want a higher voltage, lower quality chip as long as power consumption and cooling are taken care of. Until somebody finds a way to bypass the over-voltage-protection of course.
     
  19. Speccy

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    Whats the point of running high leakage high voltage and low leakage at low voltage? You may as well run all of them at the same voltage. If you did this all you would end up doing is massively increasing the power variability within a single SKU, defeating a lot of the point of binning in the first place.

    By running high leakage at lower voltage and low leakage at higher voltage you are narrowing the range of power variability of a SKU and maximising the yield of a particular SKU for a given power target.
     
  20. trinibwoy

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    IHVs do not run chips at higher voltage unnecessarily just to reduce power consumption variability. What possible benefit does that have as long as all chips come in under the rated TDP?

    Anyway, did you even read the Guru3D thread or are you claiming Unwinder doesn't know what he's talking about? :)
     
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