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Pin compatible with Zeppelin
AMD back in early 2016 seemed to call "Zeppelin" to what is now the 2*CCX core that is present on current Ryzen CPUs.
Pin compatible with Zeppelin
APU with quad core + 11 CUs.
No sign of any HBM
The core is still called Zeppelin, it doesn't refer to just 2*CCX but the whole 8-core chip with interconnects and memorycontrollers and everythingAMD back in early 2016 seemed to call "Zeppelin" to what is now the 2*CCX core that is present on current Ryzen CPUs.
I'd be shocked if HSA were really gone, but HBM, tempting as it is for APUs, is still limited in capacity and quite expensive. AMD could theoretically make a chip with dual memory controllers and PHYs, but that would cost them some effort, time, silicon area and power. Being restricted to HBM alone would make the chip unusable for a lot of server workloads, which could be a problem.
My line of thinking is if Intel gets to charge $400 for the 15-28W dual-cores with Iris Pro and eDRAM, why wouldn't OEMs ask AMD for a similarly premium APU using HBM, knowing that it'd get substantially better performance?
That’s VME as in Virtual-8086 Mode Enhancements, introduced in the Intel Pentium Processor, and initially documented in the infamous NDA-only Appendix H.
Almost immediately since the Ryzen CPUs became available in March 2017, there have been various complaints about problems with Windows XP in a VM and with running 16-bit applications in DOS boxes in Windows VMs.
After analyzing the problem, it’s now clear what’s happening. As incredible as it is, Ryzen has buggy VME implementation; specifically, the INT instruction is known to misbehave in V86 mode with VME enabled when the given vector is redirected (i.e. it should use standard real-mode IVT and execute in V86 mode without faulting). The INT instruction simply doesn’t go where it’s supposed to go which leads to more or less immediate crashes or hangs.
"Only 32-bit OSes are affected, and only when running 16-bit real-mode code". <--- doesn't sound like a blocker, unless you have to run old OS inside the VM.Felix, what does that mean in the real world ?
Is it just a problem for vm's
Let's put it this way. If you had to put your OS install inside a vm, your head would explode from rage. For the rest of the world, they're really not affected.Felix, what does that mean in the real world ?
Is it just a problem for vm's
AMD probably just doesn't bother to market it anymore. Its ROCm stack is built upon parts from the HSA effort anyway, and AMD can very well roll cache coherency and platform atomics for Raven Ridge in ROCm without HSA compliance at launch.I'd be shocked if HSA were really gone
It just costs more or less the effort of building a normal monolithic SoC, with extra cost in assembly. TBH it would just be a giant APU with a different configuration of GPU local memory. Whether it is marketable is another story.but HBM, tempting as it is for APUs, is still limited in capacity and quite expensive. AMD could theoretically make a chip with dual memory controllers and PHYs, but that would cost them some effort, time, silicon area and power.
Why would it? The so-called "HBCC" already addressed the issue, and is working very well for Nvidia under the name Unified Virtual Memory. The HMM patch in Linux is also on its way to upstream. Let alone the fact that the APU may already access pageable system memory directly without it.Being restricted to HBM alone would make the chip unusable for a lot of server workloads, which could be a problem.