AMD: RDNA 3 Speculation, Rumours and Discussion

Each chiplet seems to be able to function in a fully autonomous way. They all have their own memory PHY, set of fixed function blocks (probably video codecs?), and they communicate with each other through the L3.

To me this looks a bit like first-gen Zen but in a GPU. It also means there could be a lot of wasted space due to a bunch of fixed-function blocks being replicated and useless for all chiplets but one. Though if they could get the video codecs to work in parallel it would be awesome, especially if more chiplets = higher resolution or higher framerate encoding).

 

Won't you waste space with MCM solutions ? I mean you still need the transistors for compute functions, etc, but now you need to have more external buses to make the multiples parts of the chip communicate between them ? I'm sure I'm missing something here. Or it's "just" about yield ?

 

Not just yield but also versatility on using the same chip for a multitude of SKUs and performance ranges, the economy of scale achieved by it, and the money saved by developing only one chip.

 

A whole bunch of new patents, some GPU-relevant:

https://www.freepatentsonline.com/20200409859.pdf

https://www.freepatentsonline.com/20200409695.pdf

https://www.freepatentsonline.com/20200379767.pdf

And possibly more soon:
https://twitter.com/Underfox3

 

Maybe more recent turn of events in rendering made such an investment, as this dynamic/analytical re-sorting more feasible to explore and investe die space in?

 

Ironically, DXR 1.0 was setup to give the hardware/driver an opportunity to sort threads before execution. Inline raytracing with DXR 1.1 doesn't offer that luxury.

DirectX Raytracing (DXR) Functional Spec

 

Not sure how ironic this is. If this sorting to limit divergence can be applied to any task (not just RT), it would be really interesting in general.
Might be a way to increase RT perf also without having fixed function traversal units as well, and still no HW dependency on the classical RT algorithm - still flexible.

But just dreaming... my method of reading patents became 'just look at the images and their description, but ignore the text'

 

The patent isn’t ironic. General purpose sorting for coherence is sure to benefit both software and “hardware assisted” RT.

 

I could imagine the compiler simply looks for branches in code, adds 'sorting barriers', workgroups go idle on that and SIMDs continue with another one. Another unit performs the sorting / reordering on the idle tasks concurrently?
If so, ray tracing may have been listed just as an example in the patent.

Edit: probably i get it wrong, as reordering threads this way would destroy their context to LDS memory. But 'single threaded' shader stages like pixel or ray shaders might work.

 

Those would be good questions for the IHV driver teams. It's anybody guess whether there's any sorting at all taking place on DXR 1.0 implementations.

All else equal? Probably since the driver knows a lot more about the hardware than developers do, especially at runtime.

Yup, that's why it's the stuff of dreams.

 

All else equal? Probably not since the developer knows a lot more about the data coherency and utilized resources than driver programmers do, especially at compile time. ;°P

 

If you're interested in the context of raytracing in general: https://www.andyselle.com/papers/20/sorting-shading.pdf

 

Some very juicy rumors about RDNA 3 and Navi 31 performance.



MCM / 2 Chiplets. 160 CU.

AMD aiming for 2.5x the performance of 6900 XT.

 

Is it really chiplet if it's only 2 big ones ? Looks like Fury maxx...

 

Tbh sounds like someone just adding Navi31 specs, which are practically same as Navi21, to the recent multi-chiplet patent

 

There will be key architectural improvements over RDNA 2

They include:
Zen 3 like cache
Scalability
Improved front end.
Much better ray tracing performance
Greatly upgraded geometry capabilities, based on their work for PS5.
some actual answer to DLSS. hardware? software?
TSMC 5nm, likely late Q2 2022 release.