Heh, so AMD might launch two full generations of parts before Nvidia can get Fermi to all price points? That would be hilarious.
AMD: R9xx Speculation
- Thread starter Lukfi
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Heh, so AMD might launch two full generations of parts before Nvidia can get Fermi to all price points? That would be hilarious.
No, because clocks can take only so far and high clock rate circuits take up more area than identical but lower clocked circuits. Distributed geometry setup is the future as you can have more than 4 setup units/gpu if you want.
By electrically isolating the active silicon from the rest of the crystal, one component of leakage is reduced, and there is a benefit of potentially faster timings for less power, possibly with less engineering effort (for getting the timings, other things require special effort).
Other cute things like ZRAM and on-die lasers like SOI, though ZRAM was a waste of time, and the photonics thing not quite ready.
The modest electrical benefits of SOI have been alleged to reduce with shrinking geometries (though SOI proponents dispute it).
The downsides are that SOI wafers are more expensive, and a design must be reimplemented on SOI, as there are unique challenges to SOI and circuit types that work in bulk that do not work on SOI and vis versa.
GPUs aren't clock monsters, don't go to the same level of custom engineering like AMD or IBM CPUs, probably won't have the volume in the higher margin segments to justify two separate implementations of bulk and SOI, and are sensitive to the additional cost of SOI wafers.
It could be argued that AMD's financials are such that SOI for its CPUs wasn't a slam-dunk for them either.
IBM doesn't have to make money on its CPUs, so it cares much less.
If the CPU is on SOI, there's little other alternative.
I'm not sure Llano would help induce the discrete GPU designs to make the jump.
I'm not sure Llano would help induce the discrete GPU designs to make the jump.
http://www.xbitlabs.com/news/video/...ck_for_the_Second_Half_of_2010_AMD_s_CEO.html
Was this posted already?
Was this posted already?
With fusion both cpu and gpu will need to be either SOI or bulk, so making SOI in advance could be help in future.
In this article http://www.semiconductor.net/article/438968-Nvidia_s_Chen_Calls_for_Zero_Via_Defects-full.php in the power density/technology node grahp the leakage power has almost exponential jump after 40nm. On 28nm the graph ends but if its going in this trend to even lower nodes than it could be a real problem. On 28nm multi bilion transistor chips it will be surely SOI over bulk.
SOI reduces one component of leakage power, and that portion is not the most significant contributor, or even a significant contributor.
If leakage were to somehow make a given 28nm design untenable, SOI would probably not help too much.
A 28nm SOI discrete GPU would cost more to manufacture, and the benefits SOI would give it would be modest.
A more interesting question is how long AMD will stick with SOI. Its future usage is actively questioned.
Groo The Wanderer
Regular
The use of SOI in optics, especially Intel's silicon waveguides is due to the fact that it is much more transparent to the IR frequencies that the lasers use. Bulk is pretty opaque there. That is about the only think it brings to the table for lasers/waveguides.
-Charlie
Groo The Wanderer
Regular
GloFo said that they would have been, if it was still alive, accepted designs for 32 bulk in 1H/10 (late from what I was told), and 28nm was 2H/10. They killed 32 because of poor demand and the short time between it and 28. The engineers were put on a 40 process which for some odd reason, customers wanted.
TSMC promised 28 late this year, but given that they killed 32 entirely, changed 28 from a gate first to gate last tech, added HKMG and pulled it all in at the same time, call me quite skeptical that they will make it on time. Add in that I am told their process is kind of borked, and I am really skeptical.
If you recall, they promised 40nm volume in October. 2008. Here we are somewhere around 16 months later and they are barely at what I would consider volume.
Rule of thumb for TSMC, add a year.
-Charlie
Groo The Wanderer
Regular
I was thinking of PD-SOI when I wrote the earlier posts.
FD-SOI would be a different matter, though if Intel believes it can achieve FD gates can be built on bulk wafers, I would tend to lend credence given its track record so far.
FD-SOI would be a different matter, though if Intel believes it can achieve FD gates can be built on bulk wafers, I would tend to lend credence given its track record so far.
So Hecatoncheires would still be Evergreen-family? Since N.I. is coming either late 2010 or early 2011, since it's listed as GPU for 2011 platforms just like Evergreen was listed for 2010 platforms
http://en.wikipedia.org/wiki/Hecatoncheires
Ok so a graphics card with a lot of heads (stream processors) and stronger than the titans, Nvidia, Intel etc? Wow, this is probably the first and last time I try and figure out a product from a rumoured code name. I still can't figure out the pronounciation. Edit, theres three of them so you've got high end like Cypress, mid range like juniper and lower end like Red Wood. Thats about the only useful information from that code name is that theres 3 giants.
Intel's calls so far have been pretty good, from having 45nm without immersion and going gate-last for their metal gates.
They were also the first to settle on the Hi-K gate dielectric material, when IBM was putting out press releases on their progress on simulating their choices of dielectrics.
IBM's calls on what is needed for a mass-production process at least recently don't look to be as good, and given the low-volume market it makes its high-performance processors for, whatever choices it makes appear to benefit products in another zip code from what GPUs and AMD's CPUs need.
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