AMD: R9xx Speculation

[AlphaWolf]

They said their sources were from the internet? Let me guess... Fudzilla?

Chiphell probably, saw it there earlier.

 

[ZerazaX]

Chiphell probably, saw it there earlier.

They still say 22nd on chiphell

Plus, the ? was being sarcastic... that legitreviews link quotes Fudzilla directly underneath

 

[onethreehill]

AMD Radeon 6900 series - something to bite into after 13th of December?
As of today, the NDA lift for information relating to the AMD Radeon HD 6950 and HD 6970 will be the week of December 13th. We will be providing additional information on these products, including the exact date and time of the NDA lift along with samples in the weeks prior to launch.

This is direct from AMD - get your paws into it and start saving those dollars for just another month now!

http://www.tweaktown.com/news/17512...omething_to_bite_into_after_13th_of_december/

 

[ZerazaX]

They say this is direct from AMD, but earlier in the article this was from Shane Baxtor?

He doesn't exactly have the best record on rumors.. and wouldnt the release date be under NDA anyways?

 

[BRiT]

and wouldnt the release date be under NDA anyways?

Yes.

 

[mboeller]

I used to embrace that 1280SPs theory also in pre-release Barts times.
But then AMD doesn't need to design redundancy in their rather small chips (255mm²) after all as nv does need with close to 400mm² GF104 chip and their older and bigger bros. And G80-GF100 design approach are fairly different than RV670->Barts ("RV940") design approach. So, now i could settle with AMD simulated both versions 1280/16, 1120/32, and even 1280/32 which was rejected with ultimate goal for smaller chip. And 32ROPs needed least design optimizations over 1280/16 part, and design outperformed main competitor GTX460 even with 1120SPs.

I think that Barts contain 1280 SPs.

1280 Shaders need around 199mm² (1280/400 x 62mm²) when using Redwood and Juniper as reference. This area should already include the added ROPs too.

The uncore of the HD56xx and HD57xx seems to be around 42mm² (Juniper = 166mm²; Redwood = 104mm²). The uncore of Barts was improved, but only a small amount as it seems (+33%).

So with the assumptions Barts could contain 1280 SPs within the 255mm²

Yes I know very well that this is a "high level" overview but it seems to work.

 

[ZerazaX]

I think that Barts contain 1280 SPs.

1280 Shaders need around 199mm² (1280/400 x 62mm²) when using Redwood and Juniper as reference. This area should already include the added ROPs too.

The uncore of the HD56xx and HD57xx seems to be around 42mm² (Juniper = 166mm²; Redwood = 104mm²). The uncore of Barts was improved, but only a small amount as it seems (+33%).

So with the assumptions Barts could contain 1280 SPs within the 255mm²

Yes I know very well that this is a "high level" overview but it seems to work.

Makes sense

2x8 is a more... even number than 2x7, even if it ultimately doesn't matter, engineers like to work in 2's

 

[Harison]

Well, it ain't totally false if we could judge by this
[Apr2010] Virage Logic launches 28nm IP suite at TSMC event
And capacities should certainly be good enough for GF119 part (96SPs GF104 alike, 64-bit). With probable die size around 70mm² considering its 40nm GF108 counterpart is 116mm².

To be fair, that link doesnt say about 28nm mass production, just tools for it.

Out of curiosity, I looked around whats new with TSMC's 28nm, what I got was:

1. In 2009 TSMC said they'll have 28nm HP up and running in 2010 1H, it didnt happened. In 2010 jan/feb TSMC said they'll have 28nm HP in 2010 December. But they are silent about it either. Considering how difficult was transition to 40nm, and 28nm will be even harder, its safe to assume there wont be any major shipments of 28nm HP until 2011 1H, or even 2H.

2. Altera is getting "initial production in small volumes" until the end of the year.
http://www.eetimes.com/electronics-news/4209724/Altera-to-get-28-nm-from-TSMC-in-Q4

While its definitely possible there will be small batch of 28n GPUs in Q1 2011, but considering high volume of low-end GPUs, they already should be in mass production to have good initial availability, they wont have that with 28nm.

 

[LordEC911]

There are currently 2 rops per memory partition. I think 3 rops instead should be possible, but I'm not sure it would help a lot.

Maybe I'm just being dense but wouldn't that increase the count over 48?

Edit- Yes, I was being extremely dense and forgot how to do simple math.
I think I may need to go to bed.

 

[AlphaWolf]

They still say 22nd on chiphell

No, they don't.

 

[ZerazaX]

No, they don't.

Where haven't they? Last translation I did they said conference later this week in Beijing, info on 22nd

 

[UniversalTruth]

Guys, I don't find here any discussion about nApoleon's confirmation that R6970> GTX580. And, also, I don't see any updated information about GloFo's deals with the 28 nm tech process. Only some sentences about TSMC. But is TSMC the only option?

 

[keritto]

http://vr-zone.com/articles/amd-rad...age-launch-date-to-be-re-confirmed/10276.html

This TI component is an integrated driver-MOSFET (DrMOS) that was first used on AMD's Radeon HD 6800 Series. This DrMOS is so new to the point there is no information on it on the Web, not even from the manufacturer itself.
Supply of this DrMOS is limited, and since the Radeon HD 6800 Series and upcoming HD 6900 Series share the same VRM design, any (tight) supply from TI is shared between all the cards. This leads to a delay in HD 6970 card manufacturing, with partners receiving their final boards late as well."

This vr info should came with certified April 1st reliability afaik HD6800 uses "budget" CHiL's PWM drivers and not TI, while HD6900 probably needs somewhat better driver according to their TDP which is 1.5x and 2x of HD6870.
It's also weird that AMD now breaks pretty long history, since 1950XT times, of tying up their high end GPUs PS w/ Volterra pwm regulators.

HD5970 is very expensive to produce - it probably costs AMD more than 2x the cost of a 5870 (...) "Addressing" the GTX580 with the 5970 would be an economic disaster for AMD."

I believe ATi have far better margin for those pricey HD5970 than for HD5870, and i don't think i as customer should care too much about manufacturing cost.

HD5870 in most cases sport better cooling than HD5970, which on chip level don't need better cooling than HD5850, and in most cases they aren't heavily utilized as single chip solution. And every gear in retail channel measures their profit individually based on card, and not its BOM or manufacturing cost.

Because since the ROPs are tied to the MC and most of us seem to not believe they are going with a 384 bus with +240Gbps of bandwidth.

You're talking about nVidia here, where i'm asking about Cayman, an AMD chip I think they could easily further improve memory bw adding extra four Quad-RBE w/o going to extra weird 384-bit bus.

I thought they'd try to get them out before black friday, esp if the date is that close to BF.

More likely they dont need to fast ramp up their HD6900 series considering how much of those newly GTX580 vaporware will actually hit the stores. (*not just until Dec2010 but during product life)

btw. i dont see why there's so much of disappointment with GF100 shiny polished rebrand, aka. GF110, in GTX580 if we put aside yet another extreme low availability product on launch date (like for GTX480/470 line). It's faster, finally fully working *GF100* chip, sporting some gaming oriented rendering tweaks. And tbh, GF100 is first innovative architecture after 5yr old G70. So if they make it really available, and for somewhat more popular prices ... hope that Cayman will help there a lot ... it's decent card.

In fact i dont remember anyone did blame G80/GT200, that were similar power hogs, for their low availability in cards sporting fully functional chips on pre-announced speeds (8800Ultra, GTX280) and they sold at even more insane 800USD price tag. It's not like GF100 is deviation from it's heritage Except it's being cheaper

 

[Love_In_Rio]

Guys, I don't find here any discussion about nApoleon's confirmation that R6970> GTX580. And, also, I don't see any updated information about GloFo's deals with the 28 nm tech process. Only some sentences about TSMC. But is TSMC the only option?

As someone said in another forum he also predicted that 6850 was faster than 5870, so...
Besides i believe more in the versions about Cayman being in the 360 mm2 area rather than in the +-500. Amd left giant chips buried with R600... So...how painful ( for Nvidia ) and strange would be a 360 mm2 beating a 550 mm2 one...except for it really being the new R300!.

 

[CarstenS]

It's faster, finally fully working *GF100* chip, sporting some gaming oriented rendering tweaks. And tbh, GF100 is first innovative architecture after 5yr old G70. So if they make it really available, and for somewhat more popular prices ... hope that Cayman will help there a lot ... it's decent card.

I seriously doubt that (my bold).

 

[Sampsa]

Official confirmation from AMD:

Cayman based Radeon HD 6950 and 6970 will be delayed to week 50 (13th - 19th of December). Samples to press "weeks prior the launch":

http://translate.google.com/transla...a-6970-naytonohjaimet-julkaistaan-viikolla-50

 

[I.S.T.]

That translation is too poor to truly gain any info out of it. I mean, it keeps saying "a box of cereal."

 

[Alexko]

That translation is too poor to truly gain any info out of it. I mean, it keeps saying "a box of cereal."

That's the name of the website "Muropaketti", it means "box of cereal" in Finnish. No idea why they called it that, though.

 

[I.S.T.]

That's the name of the website "Muropaketti", it means "box of cereal" in Finnish. No idea why they called it that, though.

Well, then consider me wrong. >_>

 

[PSU-failure]

I used to embrace that 1280SPs theory also in pre-release Barts times.
But then AMD doesn't need to design redundancy in their rather small chips (255mm²)

Question is: does using a power-of-two SIMD count use that much more die space than a power-of-two-minus-one count?

Most of the driving logic needed for the additional SIMDs is here, so that's probably less than a 5% increase in die space.

Is it better to have coarse grained redundancy with a merely bigger die, fine grained redundancy or no redundancy at all?

Considering fine grained redundancy adds to the design complexity and defects usually appear clustered, that would be perfectly in line with the goal they wanted to achieve, the cheapest possible GPU in a given segment.