AMD: R8xx Speculation

Isn't it a synonym of SS strategy?

 

Not really since you can't possibly know what spot will be a "sweet spot" before you know what your competition will be.

 

RV740 is achieving, worst case (average frame rates), about 90% of HD4850 performance with 51.2GB/s. It's interesting that "over-clocking" the core works so well, implying that the margin between minimum and average frame rates is punishing the sizing of these GPUs.

Put another way, at 750MHz (and the loss of 2 TUs - not too worried about the ALUs...) it's at least 70% of RV770 performance (at 4xAA - 8xAA is another story) with 44% of the bandwidth. Admittedly we don't know what the frame rate minima are like, but that's much much healthier than I was expecting.

But arguably HD4870 has too much bandwidth for a mere 4xAA, so the comparison at 8xAA would prolly put RV740 in its place.

In a way it's doing to RV770 what G94 did to G92.

AMD's been very conservative with memory speeds for a long time. Not sure how much of a power difference there'd be between 1GHz and 1.5GHz GDDR5...

I think it'd have to be >400mm² to squeeze in a 512-bit bus, i.e. almost as big as R600.

Jawed

 

Isn't GDDR5 require more pins though? That would mean that R600 size might not be enough for 512-bit GDDR5 bus.
And how about having 384-bit bus on RV870? =)

 

I'm a bit sceptical concerning the availability of much faster gddr5. Right now the fastest chips hynix, samsung, or qimonda have listed are 1.25Ghz (5Gbps). I don't expect that to suddenly jump up a lot, though I guess something like 1.4Ghz is a possibility. I don't expect AMD to increase bus width neither though.
All these speculations about chip config assume that basic setup remains the same. Accepting that it seems reasonable to expect at least 2TFlops. With just a increase in clusters, that would only need 16 clusters at around 800Mhz. Maybe more (like 20) clusters (at slightly reduced chip clock) would pose less problems in the power/heat department.
Though I'm wondering, todays high-end chips can end up limited by chip parts which don't scale (setup), will rv870 learn some new tricks to make these parts faster?

 

What you know is where the market peaks are in terms of revenue. Thats what the strategy was dealing with and thats what RV770 was targetted towards in the planning phases.

 

Market isn't set in stone, it changes according to what's on offer. AMD made NV drop the ASPs this time pretty significantly - I believe that NV was "aiming at the sweet spot" too but it turned out that their aim was wrong because the sweet spot switched places.
You can't be sure that this won't happen with you this time. No one can. Especially with LRB on the horizon.

 

Here you can find the final RV870-specs:

ATI-Forum

Hardware-Infos

 

$649 cards are a sweet spot? everyone knows that sales at those figures were a small percentage versus the rest of the market. the sweet spot always has been below the high price/high performance parts. placing a part at 80-90% of that performance for 40% of the price seems more like 'finding a sweet spot" than marketing your new product as "previous high end price+$50"

If you're waiting for larrabee to sweep the feet under the current graphics market, prepare for a let-down.

 

For GT200-based cards? Probably yes. Don't you think?
What makes you so sure that it won't be AMD (again!) who will be in a position of "sweet spot" miss this time? How many times did they missed that spot for the last years? How many times NV did? RV770 is a great chip but let's not forget that it's great in comparision to its competition. And since you don't know what that competition will be you can't know that "sweet spot" we're talking about. You may hope but that doesn't mean that your hopes will become a reality. RV770 is just one chip, you can't assume that RV870 will repeat its success just because RV770 was great. G80 was great, GT200 was pants. Voodoo Graphics was great, Voodoo 3 was pants. Market always changes.

Everyone knows everything. And that effectively means that everyone knows nothing just assuming.
Sales numbers doesn't matter. Profit is what matters.

 

So, in comparison with RV740:

• RBE 200%
• TU 150%
• ALU 187.5%
• Bandwidth 275%

Call it 250% overall, or about 175% of HD4870. Or about 1.5x faster than HD4890. Not very exciting.

Jawed

 

http://news.ati-forum.de/index.php/...-vorrausichtliche-spezifikationen-aufgetaucht

RV870 - Vorrausichtliche Spezifikationen aufgetaucht

 

It could still be interesting if what was stuck between them was significantly changed.
Not much points to a massive change at this point, though.

The ratios between ALUs, TMUs, and ROPs aren't very clean, if these alleged specs are correct.
RV7xx had nice ratios between all three.

 

The only thing that bothers me is the 5:1 ALU:TEX. I've realised that it should be very close to 2x RV740's die size, i.e. ~275mm².

So, at $300, will it be fast enough? If it launches in June, HD4890 will be <$200, so it'd be selling mostly on features rather than performance.

Jawed

 

At least the ratio is an integer.
1200/32 is 37.5 ALUs per ROP.

 

Why is that relevant?

Jawed

 

Why is that bothering you? 48 TUs with 4 TUs per cluster means 12 clusters. 1200/12=100 which is 4 superscalars more than in RV770 cluster.
But those specs are kind of underwhelming. If those SPs and TUs won't have a much higher efficiency than RV770's then these specs would put RV870 somewhere around +20-50% of RV770. Which is less then I've hoped for -(

 

Partly it's personal preference, another thing is wondering how to distribute half a data path. The rest is how to match up the numbers with the general scheme that RV770 uses.

The way the ratios balanced before, there was a nice relationship between all the units, their clusters, lanes, and the 64-pixel batch.

Something got shifted around differently.

If TEX units are in groups of 4, that's 12 SIMDs of 20 clusters.
That's 20 pixels going through an operation (edit: VLIW packet) per clock.

What batch size is consistent with a 20-wide SIMD producing work for pixel batches that are output by 32 ROPs?

Did they widen the clusters, change other data paths?

 

Increased branching divergence penalty. It's not a huge amount, but I suspect that with Larrabee at 16 and NVidia at 32, 80 is going to start hurting. It may only be GPGPU code where anyone notices, though.

Jawed

 

Yes, I didn't think ahead to the 80 versus 32 mismatch

The only way round this that I can think of is two parallel rasterisers, each 16 wide, each feeding half the clusters. Then it'd be similar to R580 where the 16 wide rasteriser built batches of 48.

Jawed