AMD: R7xx Speculation

Discussion in 'Architecture and Products' started by Unknown Soldier, May 18, 2007.

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  1. randomhack

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    Thanks for the link. That was an excellent review. As a GPGPU guy, waiting for new CAL release that exposes that global data share.

    edit : No info about "local data share" though. Anyone have any info/links on that?
     
  2. Jawed

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    Awesome summary Rys.

    And that really is the dog's danglies. Courtesy of some crazy rabbits, apparently.

    Jawed
     
  3. Lukfi

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    =>ZerazaX: As a journalist, I happen to have those pics too. You want the wafer in a 4080x4080 rez in PNG?
     
  4. Jawed

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    In that unit called Interpolators. Then stuffed into a cache, I believe, for use as fragments are rasterised and coordinates despatched for the TU to pre-fetch.

    Jawed
     
  5. Jawed

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    Or maybe the rate is constrained by the RBEs having to send samples to the ALUs and receive completed pixels from the ALUs at the same time?

    If so, I wonder if this also applied in R6xx?

    Jawed
     
  6. ZerazaX

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    If you can put those pics somewhere, that would be awesome!
     
  7. AnarchX

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    Oh, interessting bit of information @ Rage3D:
     
  8. A.L.M.

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    I think it depends from the definition of load consumption. :wink:
     
  9. Sunday

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    I haven't noticed that any review payed attention to new and improved UVD capabilities... such a shame! Dave had excellent presentation about it!
    Great work Dave!
     
  10. AlphaWolf

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    Hothardware.com was the only site that even mentioned UVD I think, and I wouldn't exactly call it in depth.
     
  11. A.L.M.

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    Here's another interesting bit of information from the Anandtech review:

    [​IMG]

    What could it mean?
    Now, through CF-X connecting lanes printed on the PCB, what kind of "communication" is there between the two gpus that are in a HD3870X2, for example?
    And what is the current bandwidth of a CF-X connection like that?

    Because it seems that through this sideport the second gpu could actually be able to share some of the other gpu resources, like framebuffer, or something else...
     
  12. roadie

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    I too find this interesting. I am assuming that the chip is optimised for 16xAF. If it isn't, why not?
     
  13. Rangers

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    It's a great chip. especially given it's size of course, but I have a hard time calling an upper-mid range card too many superlatives. If it were the absolute perfomance leader by more than 50% or something crazy like that, maybe.

    But I often recall what Nvidia said about the competition in a transcription of a recent conference call posted right here at B3D. They said that current day ATI/AMD and them are the "two best GPU companies in history". That showed me they have a lot of respect for ATI.
     
  14. MfA

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    I'm assuming the present Crossfire-X connection simply ties the two display controllers together. The bandwidth it has wouldn't really be relevant here if what Anand says is an accurate representation of what AMD said. The Crossfire sideport would use different pins.
     
  15. A.L.M.

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    Ok, but what kind of information two cards share through a normal crossfire? Only things related to the - let's call it - "AFR queue" or also something else? 'Cause I suppose that a connection that basically connects directly one gpu to the "distributed MC" hub of the other, and viceversa, is something very different from a normal CF connection, isn't it? :???:
     
  16. hoom

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    Hexus review says the/a ringbus does still exist & is the link between L1/Vertex cache & L2/MC/ROPs :smile:
     
  17. MfA

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    Framebuffer content for video out.
     
  18. mboeller

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    Maybe this is one of the rabbits CJ mentioned?
     
  19. liolio

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    #4779 liolio, Jun 25, 2008
    Last edited by a moderator: Jun 25, 2008
  20. mczak

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    Sorry but I still don't believe there were many changes there. Even R600 could apparently do int32 add in the slim alus, and other reviews only mention that int32 shifts have been added (which are very cheap to implement), but otherwise I haven't seen anything which would indicate they now can do int32 mul (or mad). Though maybe they can do int->fp conversion, so as long as the ints are below 24 bits it may work...
     
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