AMD: R7xx Speculation

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GeForce GTX 280 41xx
GeForce 8800 Ultra 24xx

Those values don´t match very well with GT200 having almost 3 times the floating point performance of G80.
 
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Love_In_Rio said:
GeForce GTX 280 41xx
GeForce 8800 Ultra 24xx

Those values don´t match very well with GT200 having almost 3 times the floating point performance of G80.
Click to expand...

But with the ~35% higher bandwidth and the ~22% better texelfillrate.

Also the theoretical FP-performance of the Ultra is around 581GFlops including the missing MUL. So the theoretical performance of the GTX280 is ~ 60% higher. Maybe the GTX280 still has this missing/multiple use MUL unit which can be used independent of the TMUs only for GPGPU workload.
 
Love_In_Rio said:
GeForce GTX 280 41xx
GeForce 8800 Ultra 24xx

Those values don´t match very well with GT200 having almost 3 times the floating point performance of G80.
Click to expand...
Well if floating point performance translated into gaming performance, then we would assume PS3 was more than thrice faster than the 360, RV670 faster than G80/G92, yada .. yada ..
 
"ATI Radeon HD 4800 Series" = ati2mtag_R7X, PCI\VEN_1002&DEV_9440
"ATI Radeon HD 4800 Series " = ati2mtag_R7X, PCI\VEN_1002&DEV_9442
"R700" = ati2mtag_R7X, PCI\VEN_1002&DEV_9441

There are not 4 entries in Cat 8.6 for RV770, but only 2 + R700XT. So the infos leaked about 4 entries w/ RV770 are wrong.
 
Maybe, anyway he just bothers me anyone stupid enough to stick to one brand because of Loyalty shouldn't be writing articles its hard enough digging through his biased bs to dig up some real information. It may be all true and it makes sense but he paints everything as if nv is about to crumble any minute which they way i interpret it its not too bad in fact it looks like another g80 gold mine.
R700 is going to be great but its not going to be a gt200 killer. As great as it that would be for innovation its not going to happen. They designed it to be a efficient mid-range affordable card and thats what its going to be which shows ati delivers what they promised i like ati but im not going to forgo buying a 280gtx just because i like ati.
 
Lukfi said:
Perhaps you'll be surprised when GT200 comes out.
Click to expand...

I think most of the stuff in the Inq article has been known for a while now. Personally I expect the GT200 to be a brute force variant of the G92/G80.

Maybe the R700 manages to beat the GT200 by a small margin - but at what cost? Microlags (is this the common word in English?) and other CF/SLI disadvantages. But on the other side: If ATI uses their X2 expierence they might be able to tweak the driver and solve most of the current problems. That would be awesome :D.
 
I believe you are referring to micro stuttering and if I recall correctly, ATi has been trying to do something about it in the drivers...
 
Lukfi said:
I believe you are referring to micro stuttering and if I recall correctly, ATi has been trying to do something about it in the drivers...
Click to expand...
Thanks for the hint. If they finally managed to solve this issue the R700 might be an interesting alternative to the GT200/GT200b because it supports DX10.1.
 
Can the ring bus be used to connect the two dies together? If it is still 512bit internally, would it be possible to use half of it (256bit) to connect to 512mb of GDDR5 directly and the other half to connect to the ring bus on the other die?

With that said, I would be shocked if r700 was anything but another X2 crossfire card like 3870X2.
 
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"The days of monolithic mega-chips are gone." - Rick Bergman, AMD.

This phrase was the inspiration of my multi-GPU concept.
So, what do you think of it ? Is it viable ?

RV870-Muli-GPU-Concept.png


(Yeah, I know... my photoshopping skill is out of this world. :cool:)


With the same two chips (Master & Slaves) AMD can make is entry-level, mid and high-end parts.

HD 54x0 : 1 Master + 1 Slave (maybe a one-in-all chip is preferable for the low-end :oops:)
HD 5670 : 1 Master + 2 Slaves (with lower clock for the 5650)
HD 5850 : 1 Master + 3 Slaves
HD 5870 : 1 Master + 4 Slaves
And for the HD 5870-X2, I don't know if it's feasible a all.

The Master chip will contains all the redundant features (RAMDAC, UVD, PCIe, VIVO, ...) and 4 FlexIO Processor Bus.
Each of the slaves chip will contains SP, TMU, RBE, ..., and some caches.
Only 2 chips to develop and produce -> this can save a lot of time and money. :p
AMD can upgrade the Master chip (new UVD, new output, ...) without modifying the Slave chip, or other way around.


My concept it is based on some infos that I found here and there:

"01/03/2006: Rambus today announced the signing of a $75M patent license agreement with AMD, which grants AMD a license to Rambus patents for the next five-year. The license includes Rambus patents used in the design of DDR2, DDR3, FB-DIMM, PCI Express and XDR controllers, as well as other current and future high-speed memory and logic controller interfaces." (LINK)

If AMD paid Rambus $75M (when they don't have a $ to waste), they must want something from them... ;)

"The FlexIO processor bus can be backward compatible with existing LVDS-based standards, including HyperTransport, SPI-4, and RapidIO, allowing easy integration into next-generation products, while providing a path to higher levels of performance." (PDF - 711Kb)

Notice the 14-letters word starting with an "H" ? :smile:

"The FlexIO interface is organized into 12 lanes, each lane being a unidirectional 8-bit wide point-to-point path. Five 8-bit wide point-to-point paths are inbound lanes to Cell, while the remaining seven are outbound. This provides a theoretical peak bandwidth of 62.4 GB/s (36.4 GB/s outbound, 26 GB/s inbound) at 2.6 GHz. The FlexIO interface can be clocked independently, typ. at 3.2 GHz. 4 inbound + 4 outbound lanes are supporting memory coherency." (WIKI)

FlexIO is very fast, is backward compatible with HyperTransport, is support memory coherency, and is a well-proved technology (PS3).
So I think it's the best technoloy for multi-GPU, and maybe AMD is thinking the same way...
Or do you think that Hector wants to throw $75 millions of dollars out of windows ?

I don't know if AMD will implement this kind of multi-GPU with his R800 or R900.
I don't even know if my concept is viable/possible or not.
But it's the way I view it.


Some additional info:
· FlexIO area = 12,6mm² with 90-nm process node: WIKI.
· Rambus FlexIO bus picture: PICTURE (original link)

Some related patents:
· US Patent 7325086 - Method and system for multiple GPU support (Issued on January 29, 2008)
· US Patent 7340557 - Switching method and system for multiple GPU support (Issued on March 4, 2008)
 
shiznit said:
Can the ring bus be used to connect the two dies together? If it is still 512bit internally, would it be possible to use half of it (256bit) to connect to 512mb of GDDR5 directly and the other half to connect to the ring bus on the other die?

With that said, I would be shocked if r700 was anything but another X2 crossfire card like 3870X2.
Click to expand...

The point of the ringbus is that it makes it easier to attach things. They wouldn't necessarily peel off 256 bit as much as connect the entire bus to another card. They could attach 100 memory chips to it if they really wanted but bandwidth would be limited to that of the internal bus.
 
I don't suppose someone is brave enough to slice off the discussion of how to utilize shared memory between two GPUs into a new thread?
 
Wirmish said:
"The days of monolithic mega-chips are gone." - Rick Bergman, AMD.

This phrase was the inspiration of my multi-GPU concept.
So, what do you think of it ? Is it viable ?

RV870-Muli-GPU-Concept.png


(Yeah, I know... my photoshopping skill is out of this world. :cool:)


With the same two chips (Master & Slaves) AMD can make is entry-level, mid and high-end parts.

HD 54x0 : 1 Master + 1 Slave (maybe a one-in-all chip is preferable for the low-end :oops:)
HD 5670 : 1 Master + 2 Slaves (with lower clock for the 5650)
HD 5850 : 1 Master + 3 Slaves
HD 5870 : 1 Master + 4 Slaves
And for the HD 5870-X2, I don't know if it's feasible a all.

The Master chip will contains all the redundant features (RAMDAC, UVD, PCIe, VIVO, ...) and 4 FlexIO Processor Bus.
Each of the slaves chip will contains SP, TMU, RBE, ..., and some caches.
Only 2 chips to develop and produce -> this can save a lot of time and money. :p
AMD can upgrade the Master chip (new UVD, new output, ...) without modifying the Slave chip, or other way around.


My concept it is based on some infos that I found here and there:

"01/03/2006: Rambus today announced the signing of a $75M patent license agreement with AMD, which grants AMD a license to Rambus patents for the next five-year. The license includes Rambus patents used in the design of DDR2, DDR3, FB-DIMM, PCI Express and XDR controllers, as well as other current and future high-speed memory and logic controller interfaces." (LINK)

If AMD paid Rambus $75M (when they don't have a $ to waste), they must want something from them... ;)

"The FlexIO processor bus can be backward compatible with existing LVDS-based standards, including HyperTransport, SPI-4, and RapidIO, allowing easy integration into next-generation products, while providing a path to higher levels of performance." (PDF - 711Kb)

Notice the 14-letters word starting with an "H" ? :smile:

"The FlexIO interface is organized into 12 lanes, each lane being a unidirectional 8-bit wide point-to-point path. Five 8-bit wide point-to-point paths are inbound lanes to Cell, while the remaining seven are outbound. This provides a theoretical peak bandwidth of 62.4 GB/s (36.4 GB/s outbound, 26 GB/s inbound) at 2.6 GHz. The FlexIO interface can be clocked independently, typ. at 3.2 GHz. 4 inbound + 4 outbound lanes are supporting memory coherency." (WIKI)

FlexIO is very fast, is backward compatible with HyperTransport, is support memory coherency, and is a well-proved technology (PS3).
So I think it's the best technoloy for multi-GPU, and maybe AMD is thinking the same way...
Or do you think that Hector wants to throw $75 millions of dollars out of windows ?

I don't know if AMD will implement this kind of multi-GPU with his R800 or R900.
I don't even know if my concept is viable/possible or not.
But it's the way I view it.


Some additional info:
· FlexIO area = 12,6mm² with 90-nm process node: WIKI.
· Rambus FlexIO bus picture: PICTURE (original link)

Some related patents:
· US Patent 7325086 - Method and system for multiple GPU support (Issued on January 29, 2008)
· US Patent 7340557 - Switching method and system for multiple GPU support (Issued on March 4, 2008)
Click to expand...

That's a lot of stuff connected to one small chip in the middle. Maybe the central chip could always a full GPU (like you mentioned for low end) but there can also be several smaller ones with just the SPs, TUs, etc that can be added on the board.
I have a feeling though that whatever they come up with will be two equal GPUs.
 
Mat3 said:
That's a lot of stuff connected to one small chip in the middle. Maybe the central chip could always a full GPU (like you mentioned for low end) but there can also be several smaller ones with just the SPs, TUs, etc that can be added on the board.
Click to expand...
It's true that the Master chip may be too small for all those needed pins...

So the Master chip could incorporate one of Slave chip and be self-sufficient. (Master = low-end) :D
With a Master chip like this, we only need one Slave chip to double the speed, and at the same time, we can decrease the pins count.
We can also use high density memory module to reduce even more the pins count.

Mat3 said:
I have a feeling though that whatever they come up with will be two equal GPUs.
Click to expand...
Maybe for the next generation (G800) but one of these days two GPU will not be enough.

Imagine the size of a RV770 on 32 nm...
Imagine now that you could connect 4 of theses chip on a 9" PCB with 2 Go of shared "GDDR6".

:p
 
1. I don't think RV770XT will lack in bandwidth at all and there's plenty of headroom for GDDR5 to scale in frequencies.
2. I don't think its successor will be on 32nm.
3. Before I hear about anything >1 chip on a SKU and even more about 4, I'd prefer to hear first how frame latency is going to be handled.
 
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