Well IPC is about the same as the E6750, so given Ninjaprime's figure of "26.8% instruction advantage" and the fact that the PII has a ~900MHz clockspeed advantage, you can do the math.
What is meant by "26.8% instruction advantage"? Does this mean that the E6750 basically executes general code 26.8% faster than Xenos?
I'm just trying to figure how a 2 core 2 thread CPU with lower clocks comes to beat a 3 core 6 thread CPU. I suppose OoO execution and big caches help, but I suppose there are more factors at play.
What is meant by "26.8% instruction advantage"? Does this mean that the E6750 basically executes general code 26.8% faster than Xenos?
I'm just trying to figure how a 2 core 2 thread CPU with lower clocks comes to beat a 3 core 6 thread CPU. I suppose OoO execution and big caches help, but I suppose there are more factors at play.