AMD: Speculation, Rumors, and Discussion (Archive)

[3dilettante]

The stack height doesn't change. Both JEDEC papers describes up-to 8-dies (layers) with one channel per die (layer). Seems that several differences between "HBM1" and "HBM2" weren't related to JEDEC standard, but to manufacturers decision (in particular: manufacturing process, max. four layers per chip for "HBM1"…)

The revision adds a global signal for a stack ID for the high-density version of pseudo-channel mode, as well as a few other formerly unmentioned redundant signals and the method of using them, a catastrophic thermal event signal, and a few other changes.

If the revision is merely a codification of what Fiji already does, then that would be fine, but if the revision is a summation of various lessons learned from Fiji and other stakeholders, Fiji's support if there is support may come with an asterisk.
The behaviors with pseudo-channel and the new stack ID signal (seems like a chip-select except for picking between two 4-hi halves of an 8-hi stack) sort of suggest that in the universe of possible implementations, HBM is starting to lean in a direction.

There's a row hammer mitigation mode, if a GPU should care, and the highest density stack comes with pseudo-channel and the stack ID signal. As an aside, Nvidia is the GPU vendor so far that has mooted planning a product that uses 8GB stacks, since they discuss a 32GB future compute product.

Rebranding as a 8GB card with optimized PCB and/or firmware for higher clocks / lower power consumption. Something like the treatment that Hawaii got in the 290->390 transition.
Like I said before, I'm convinced that Fiji won't be replaced in 2016.

The prior revision has a capacity ceiling that would allow an 8GB card.
The latest HBM can take things to 32GB, and also inserts some requirements like thermal event signalling as density increases.

 

[sebbbi]

Think of 12bit PQ EOTF as a lossy compression which compresses 15~16bit, 20fstops of dynamic range down to 12bit. A Hollywood colorist named Joe Kane also argues you pretty much need 16bit color depth to use up entire Rec.2020, that's why 12bit PQ curve is pretty much required for full Rec.2020 coverage. If we have stayed with gamma (CRT), increasing data infrastructure up to 16bit would have been a colossal challenge.

I am wondering, why not go with Y16Cr10Cb10 without chroma subsampling (CrCb also at full resolution). Would give much better dynamic range and takes identical BW/storage of R12G12B12.

 

[gamervivek]

Venturebeats interview with Koduri. Besides the talk of 16k and VR, there was some stuff about the Polaris GPUs and a dig at nvidia. He sounds pretty confident on landing ahead of them this gen.

Yes. We have two versions of these FinFET GPUs. Both are extremely power efficient. This is Polaris 10 and that’s Polaris 11. In terms of what we’ve done at the high level, it’s our most revolutionary jump in performance so far. We’ve redesigned many blocks in our cores. We’ve redesigned the main processor, a new geometry processor, a completely new fourth-generation Graphics Core Next with a very high increase in performance. We have new multimedia cores, a new display engine.

We believe we’re several months ahead of this transition, especially for the notebook and the mainstream market. The competition is talking about chips for cars and stuff, but not the mainstream market.

http://venturebeat.com/2016/01/15/a...graphics-immersion-with-16k-screens/view-all/

More, presumably, big Polaris ES on the move, probably a couple of months to repi's twitter feed.

 

[Alexko]

Polaris 10 and 11? What does that mean?

 

[Love_In_Rio]

Polaris 10 and 11? What does that mean?

GloFo 14nm FINFET and TSMC 16nm FINFET?.

 

[gamervivek]

I was thinking that it might be the confirmation of the tweaktown report that they had the enthusiast class Polaris GPU at CES.

Two versions might also be full chip and the cut down chip.

 

[Alexko]

But why 10 and 11, as opposed to A and B if the micro-architecture is the same, or 1 and 2 if it is different?

 

[Deleted member 13524]

My understanding was that Polaris 10 is the small GPU for thin-and-light notebooks that was shown running Battlefront and Polaris 11 is the higher performing GPU that was reportedly shown behind closed doors.

 

[gamervivek]

Perhaps the first digit is for generation and the second for the chip. Or Polaris being an umbrella term for different IPs is applied to previous chips as well and these are the 10th and 11th chips respectively.

My understanding was that Polaris 10 is the small GPU for thin-and-light notebooks that was shown running Battlefront and Polaris 11 is the higher performing GPU that was reportedly shown behind closed doors.

Same here, but he says, 'This is Polaris 10 and that’s Polaris 11.' as if pointing them out besides each other. Which somewhat takes away from that possibility.

 

[Deleted member 13524]

Same here, but he says, 'This is Polaris 10 and that’s Polaris 11.' as if pointing them out besides each other. Which somewhat takes away from that possibility.

We don't know what he was pointing at, and the reporter didn't specify either..
He could be pointing at two desktops, at two diagrams, he could simply be gesticulating, etc.

He said before that there were two distinct FinFet GPUs coming this year.
In this interview, Raja also said RTG is changing their naming scheme from GPU names that are completely disconnected (to everyone but those with a MsC in World Geography) to family name + codenumber. They're doing this in order facilitate communication between them and with the press (why the hell did they part from the R/RVxxx scheme anyways?).
So now we have Polaris (architecture) 10 (codename) and Polaris 11. Perhaps it'll be [architecture name] and then 10 for low-end, 11 for mid-end, 12 for high-end and 13 for enthusiast. And then there can be a Polaris 20, 21, 22 and 23 for refreshes.

 

[Kaotik]

Not sure if this is the appropriate thread for this, but anyway - remember the claimed AMD slide leaked by Fudzilla, which had MCM with "Zeppelin" CPU and "Greenland" GPU, connected by GMI interconnect (100GB/s)?
At least the interconnect is real and in development: https://translate.google.com/transl...co.jp/docs/column/kaigai/20160115_739108.html
Apparently full memory coherency between discrete GPUs and CPU can't be confirmed yet, but it's at least on the plans

 

[3dilettante]

But why 10 and 11, as opposed to A and B if the micro-architecture is the same, or 1 and 2 if it is different?

It could also be Polaris 2 and 3, depending on how you count your 1s and 0s.

I think I like some of what Koduri is saying with regards to taking a more assertive stance when it comes to generational improvements and long-term targets, should the words be paired with action. Granted, at least some of it can be pent-up design work lost to the 20nm skip.

Besides, the consoles have been out for several years and AMD's semicustom and APU efforts have leveraged graphics to the point that it seems to be reducing progress. Graphics needs at least some exclusive attention before it gets put through the leveraging process again.

 

[Deleted member 13524]

Taken from a forum post. I asked where it came from.
For now, just take it as pure speculation:

Polaris 10 is an engineering sample for the APU Raven Ridge and the dGPU R7 460X. <50W power comsuption
R7 460X : 4 Shader Engines with 4 CU/SE => 16 CU : 1024 SP + 64 TMU
Other declinaisons for APU with 3 and 2 CU/SE would be.
Other declinaisons for dGPU with 7 and 8 CU/SE would be like for R7 470 and 470X

Polaris 11 is an engineering sample for the dGPU R9 480X. <150W power comsuption
R9 480X : 6 Shader Engines with 8 CU/SE => 48 CU : 3072 SP + 192 TMU
Other declinaisons for dGPU typically with 7 CU/SE for R9 480, and more CU/SE (from 10 to 16) for 490 to Fury2 X.

 

[Alexko]

If the R7 460X specs are correct, then there's very good news: Pitcairn will finally die!

 

[Deleted member 13524]

If the R7 460X specs are correct, then there's very good news: Pitcairn will finally die!

And you get console performance at notebook-friendly power consumption, which is exactly what was promised.

So one GPU to replace Bonaire and Pitcairn, and one GPU to replace Hawaii. Tonga and Fiji live to see another day, which makes sense because they're the last GPUs from AMD with GCN3.
The lower number of CUs per SE for the lower end seems also great because now they get 4 geometry engines (Bonaire and Pitcairn had 2), so the lower performing cards get a lesser hit from geometry intensive situations.

Assuming the 470X is Tonga's replacement for 2017, it'll have the same number of shader engines but with the CUs-per-SE upped, and the same will be true for the enthusiast GPU replacing Fiji.

I also like the idea that Raven Ridge's iGPU is an exact Polaris 10, meaning the Zen+GCN4 APU won't cut corners to get the promised console performance. Also, this kind of compute power is definitely not just getting dual-channel DDR4 for bandwidth, so I think HBM is to be expected for APUs in 2017.

 

[McHuj]

I was going to ask. Did anyone actually see Polaris 11 on a board? Is it hooked up to HBM or GDDR5? Even with additional BW compression, I;m guessing it would require ~400 GB/sec and I'm not sure a 512-bit bus is exactly feasible for a mainstream part.

 

[Deleted member 13524]

Did anyone actually see Polaris 11 on a board? Is it hooked up to HBM or GDDR5?

No one (without a NDA) has seen Polaris 11.
I think Polaris 11 is probably coming with HBM. Maybe two stacks of HBM rev2 would suffice?

That would also explain why the Nano got such a drastic price decrease. With >Hawaii performance at less than 150W and HBM allowing for a small PCB, there would be little reason to buy the Nano. By then, Fiji would be better spent on Fury cards.
With the recent news of the GTX 970 becoming the most popular card on Steam, Polaris 11 is bound to target its market.

 

[RedVi]

Reduced TDP is great, but aiming for similar performance to todays parts can't be the best of ideas...

Limiting 480X to <150w and performance <Fury X when Nvidia could release something slightly faster than a 980Ti at <200w pretty easily would be a terrible move IMHO.

 

[gamervivek]

The die size for the smaller chip is in the cape verde range, so it's more like R7 250X currently, though it might reach the x50 after a rebranding.

Pitcairn went to gpu heaven, at least in laptops, with the release of Neptune. wccftech were calling it GCN2.0 before it was cool.

It was indicated back in January 2013 that AMD was working on new mobile GPUs based on the upcoming Sea Islands GCN 2.0 architecture codenamed “Solar Series”. AMD’s Radeon HD 8970M, part of the new mobile GPU lineup has been leaked in performance slides of MSI’s upcoming GX70 G-Series notebook by GDM.or.jp. (Via Videocardz)

​

Read more: http://wccftech.com/amd-radeon-hd-8970m-neptune-sea-islands-gpu-performance-unveiled-msi-gx70-notebook/#ixzz3xeib2GMB
​

And more 'information'.

Spoiler

Pascal is several months (estimated up to 2 quarters) late.

On topic:

Small GPU demoed at CES was a Polaris 10 engineering sample. Will be used in Raven Ridge APU and R7 460X Discrete GPU which uses less than 50W
16CUs, 64SP per CU = 1024 SP + 64TMUs Pitcairn is dead long live Polaris 10!

Polaris 11 demoed behind closed doors was R9 480X engineering sample using less than 150W
48CUs, 64SP per CU = 3072 SP + 192 TMU (pretty much 3X Polaris 10)

Big Polaris, Fury X replacement should be double of Polaris 11 which will come out to be 6144SPs

No concrete clocks or performance figures except huge smiles on AMD reps when asked about performance, interpret that however you want

P.S: Forgot about 490X, it should be 3840 SPs
P.P.S: Gotta love how defensive and knee jerk some people get at a few lines of information lol.

http://hardforum.com/showpost.php?p=1042091070&postcount=17

 

[Raqia]

Looks like we're in for 16 GB configs w/ a 4 stack and 1 TB/s of memory bandwidth shortly:

http://techreport.com/news/29614/samsung-begins-mass-production-of-4gb-hbm2-memory-chips