NVIDIA GF100 & Friends speculation

I don't really count that as fully independent power planes. They may be separated internally (for power gating), but externally they only have one vcc plane (otherwise that would imply different pinouts for dual and quad cores for example), at least in the diagrams I saw (and the official intel specs). I don't count that as independent power planes since it is impossible to have separate voltage regulators with this design.

On chip it means that the power planes are independent, what isn't independent is the voltage planes at the package level. We likely won't see fully independent voltage scaling until technologies like silicon integrated voltage regulators make it into reality except for exotics like cell phones.
 
That picture is rather oldish. I think it was consented on being a partners OC board for GTX 480.
 
Its really incredible that 5 days before release we are still in the dark about GF104 actual gaming performance.. Are we in for a shock?
 
Actualy why is the 5800 pcb so big with just 256bit bus and 188W TDP. :?: GTX480 even with the hole in the pcb is litle bit smaler. And thats a 384bit giant chip with near 300W real TDP.
 
Actualy why is the 5800 pcb so big with just 256bit bus and 188W TDP. :?: GTX480 even with the hole in the pcb is litle bit smaler. And thats a 384bit giant chip with near 300W real TDP.

Both have the same length for the PCB -- it's the cooler shroud that makes HD5870 SKU a bit longer.

The HD 5870 cooler is also designed to fit within PCI Express dimension specifications, which the reference cooler for GTX 480 does not. As my thermal engineer would say "it's all about thermal mass".

AiB designs for default HD 5870 are generally smaller, some of which stay to PCIe dimensions and others which don't (its not so much of an issue in the channel).
 
Those over here do not count? It's not only 3DMarks...

http://we.pcinlife.com/thread-1462076-1-1.html

ok... disappointed.. especially at Uniengine o_O
Ok, Neliz was right at closer to GT200.. o_O

So with around more 100 "cuda cores" it doesnt manage to beat a GTX275 handily? Very very lame... TMUs are probably the culprit or?
On second look, bandwith is much more lower, although in memory ammount there is not as much of a difference.. another culprit perhaps?
But Im very astounded at UniEngine performance :eek:
 
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ok... disappointed.. especially at Uniengine o_O
TMUs are probably the culprit or?

I still hope that GF104 will come with the same amount of TMUs enabled as GF100, or at least make more sense in comparison to GT200, so we can ask what nV has done to the TMUs in GF100.
 
ok... disappointed.. especially at Uniengine o_O
Ok, Neliz was right at closer to GT200.. o_O
But Im very astounded at UniEngine performance :eek:
How so? It was well known that when you go down the nV lineup, tesselation performance goes down in the process, while HD5500-5800 (in theory anyway) have exactly the same tesselation performance per clock
 
How so? It was well known that when you go down the nV lineup, tesselation performance goes down in the process, while HD5500-5800 (in theory anyway) have exactly the same tesselation performance per clock

Well I would expect that if we were talking about a 256 core part, not a 336 core that is close in real world performance to the GTX465. I smell something fishy there, and its not related to what you said. Probably closer to what Neliz said about GF104 being more similar to GT200 than GF100...

The gap between GF100 and GF104 in tesselation is HUGE! Too big to justify like that, IMO. If GF100 is mile aheads on tesselation from Cypress, its really weird that the next derivate from it in performance is miles behind the same Cypress.
So anyone wanna bet FPS of GF108 in UniEngine? 0.0

1 FPS? 0,5FPS?

Another hipothesis: the reduction and/or elimination of L2 cache memory might be also related to tesselation low score?
 
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The gap between GF100 and GF104 in tesselation is HUGE! Too big to justify like that, IMO. If GF100 is mile aheads on tesselation from Cypress, its really weird that the next derivate from it in performance is miles behind the same Cypress.
[...]
Another hipothesis: the reduction and/or elimination of L2 cache memory might be also related to tesselation low score?
One possibility is that the bottleneck has shifted from TMUs (in 480) to shaders (in 460). Tesselation performance depends on available shader power, not just the fixed function tesselator.

It's probably a combination of factors.
 
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