xbox360 gpu explained...or so

psurge said:
BTW - I'm equally excited about the RSX pipeline architecture, maybe because info on that is non-existent. I figure that just because it can't process vertices doesn't mean that it won't do something novel with regards to branching...
No vertex processing? Is there any new info or is this just the old rumor?
 
3dcgi - apologies: that sentence was just FUBARed. What I meant to say is this :

Even if the RSX has separate execution units for pixels and vertices (which seems very likely given all the rumors), the pixel "pipeline" architecture could still be quite novel and interesting with regards to branching.

Regards,
Serge

P.S. I'm not in any way an industry insider, so any info I speculate on is from this or other on-line sources.
 
Having waded through a fair few pages of technical gubbins I have come to the conclusion that Joe's diagram is, to the actual end user in the immediate future, the best summation and that is because the chip will only be in a console.

Asking whether this unified design might be limited should not raise it's head in a console where the developers are writing bespoke code for it I would have thought. You should just not get stalls or lack of resources for pixels or vertex shading or else the coder has not done a very good job.

Surely the interesting question on whether it is better than nvidia's approach of keeping the shaders seperate for now will only come about when R600 based PC video cards appear that have to run games, benchmarks and demo's not written particularily for it. And that's some time off. And by then they may have even changed it considerably as a compromise / watered down / jack of all trades version , rather than what we are looking at today.

I'm not the most technical of people though I must confess.
 
DemoCoder said:
nAo said:
Jawed said:
Clearly a great example of vertex fetch limited rendering is a stencil shadow rendering pass. Xenos should be very good at those...
Stencil shadows rendering is vertex fetch limited? are you serious!? You must be kidding..

The R500 should be a monster at this. 64Z per clock and all 48 ALUs allocated to vertices. (is it possible?)

If no shader program is assigned, and color writes are disabled, will the arbiter never try to assign ALUs to pixels, or are they still neccessary for Z/Stencil data to flow to the eDRAM/ROP chip?
If the triangles are small (< 4 quads), Xenos could actually be vertex output limited in such a situation. ;)
1 vertex/clock seems a bit low at first, but consistent <4 (2) quads per triangle is very rare, especially for stencil shadows!
For stencil shadows, you have an awful lot of ops to spare on vertex work, so I think you will want to do all the silhouette extrusion and a few levels of tessellation using the shaders.
 
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