Huh? Sure you can.
The way modern AMD memory controllers work, there are 4 separate 32-bit channels here. All accesses are done as 64-byte cache lines, and the entire cache line is always stored in a single channel, over 16 clocks.
So the total bandwidth of the system is 224GB/s. If you are running a load that is evenly distributed between all 4 channels, you get 224GB/s. If you are running a load that is only localized on one channel, you get 56GB/s. If you are simultaneously running two loads, one of which uses only one channel, and the other is distributed evenly, your useful total bandwidth might fall below 224GB/s, as one load hogs one channel and causes the other to wait on it. If the scheduling for requests is even, at worst it halves the effective bandwidth for the load that is using all 4 channels, as it completes the other loads faster and builds up a buffer of loads for that fourth channel until it runs out of capacity to buffer and starts stalling.
Generally, you don't want to be doing a lot of accesses to that unbalanced extra memory. The only reason the system is reasonable is that most of the time, you aren't going to do that, as you first stuff the OS reserve there, and then on XSX you maybe stuff some of your housekeeping stuff that you are not using much most of the frame.