This GF4 with its LSA II....

[Dave B(TotalVR)]

Haha, first useful post

Anyway, exactly what is the difference? can it split the bus into smaller divisions or what? I read the bit on Toms hardware and it is about as in-depth in this particular area as Steven Hawking is in a primary school maths class.

Is there a white paper on it somewhere or something?

Oh yeah, as for this forum, its great, dunno if my sig is gonna work yet but u need a new thread button in the thread list menu, I had to start reading a thread before I could start a new one.

Dave

 

[FireBall]

http://www.gamingin3d.com/articles/gf4/

here is all the Nvidia's pdf's

 

[nAo]

I really don't know what's going on with LSA II, but it could be nvidia engineers have implemented some better scheduling access scheme to memory to improve performance. Auto precharghe is nice too, but I believed it was implemented even on the 'old' nv10 (If my memory help me even in the Neon papers from HP there is some mention about precharching memory banks knowning with anticipation which banks the GPU gonna need in the 10-20 clocks or so..)
Should be nice downclock a GF4 core and memory to a ti200 or ti500 level and do some comparisons (the extra 64 MB shouldn't be a problem).

ciao,
Marco

 

[Dave B(TotalVR)]

Thanks, Im busy right now but I will read up on it later..

Dave
p.s. how do I always have 'enable sig' checked

 

[Kristof]

Preferences I would guess, although it ain't workin for me at the moment.

 

[Reverend]

In addition to the "LMA II", there are other questions as well. We will try to get some answers and probably, if the content is enough, make a second article about the GF4's tech.

 

[nAo]

From here: http://www.gris.uni-tuebingen.de/~meissner/courses/cghw99/pdf/neon.pdf

Some key components
to Neon's performance are:
· a unified memory to reduce idle memory cycles,
· a large peak memory bandwidth (3.2 gigabytes/
second with 100 MHz SDRAM),
· the partitioning of memory among 8 memory controllers,
with fine-grained load balancing,
· the batching of fragments to amortize read latencies
and bus turnaround cycles, and to allow prefetching
of pages to hide precharge and row activate
overhead

I see a pattern here.. :smile:
Btw..we just knew nVIDIA wasn't reinventing the weel with his croosbar architecture..

ciao,
Marco

 

[Dave Baumann]

here is all the Nvidia's pdf's

For B3D's purposes the pdf's are a poop really. this is the reason the preview includes the list of questions at the back.

I was hoping to get a number of these things cleared up at the Euro launch today, but unfortunatly they didn't have any really techie guys who could go into that detail, so I'm going to have to do an email interview.

The obviousl improvements come from PreCharge and supposedly 'Quad Cache' (but I swear they must have had more than one chache previously!). I asked Dan Vivoli wher the extra "50%" comes from beyond that nad he has said they've made further optimistations on the Z-Occlusion culling, but Dan couldn't describe what at the time. The documentation say's "up to 4X the performance" from Z-Occlusion which indicates 4 early Z retirements per pixel pipe, which, if so, would be unchanged from GF3; I assume they have just made some optimistations (possibly even software ones) to the effectiveness of it.