Thermal issue : Will EE3 be able to survive the heat?
- Thread starter DeadmeatGA
- Start date
Panajev2001a
Veteran
Re: ...
Deadmeat,
Serial Instruction = 1 FPU OR 1 FXU used out of 4 FPUs and 4 FXUs... they can do tricks like that and more as the Suzuoki patent also described.
DeadmeatGA said:
Deadmeat,
Serial Instruction = 1 FPU OR 1 FXU used out of 4 FPUs and 4 FXUs... they can do tricks like that and more as the Suzuoki patent also described.
DeadmeatGA
Banned
...
To Paul
Accordingly, Suzuoki presents four different CELL ASIC configurations, the "Server" chip with 4 PEs, the "Workstation" chip with 2 PEs + 2 VSs, the "Visualstation" chip with 1 PE + 1 VS, and the PDA chip with 1 VS.
Let's recap what was actually said in the patent application
Devices identified on this CELL network
106 : Client Computer(The only one with visualizer attached(aka GS3)
108 : Server Computer
110 : CellPDA
112 : CellTV & Others
Client 106 has fewer modules than server 108. Therefore it is one of either workstation chip(2 PEs + 2 VSs) or the visual statio chip(1 PE + 1 VS).
To Paul
Yap. And PSX3 is no workstation, it is a mere $399 console. A console Kutaragi says doesn't intend on losing money on. He can't break even if he started putting a couple thousand dollar server chip into PSX3.
???Looks like a server to me.
Well, the patent application makes it clear that there are four different types of CELL ASICs planned, a server, a workstation, a low end visualstation(Most likely to be PSX3), and a PDA.
Accordingly, Suzuoki presents four different CELL ASIC configurations, the "Server" chip with 4 PEs, the "Workstation" chip with 2 PEs + 2 VSs, the "Visualstation" chip with 1 PE + 1 VS, and the PDA chip with 1 VS.
I don't hate Sony. I just want you to realize that you are not going to have a teraflop supercomputer in your home in time for Xmas 2005.
Let's recap what was actually said in the patent application
Devices identified on this CELL network
106 : Client Computer(The only one with visualizer attached(aka GS3)
108 : Server Computer
110 : CellPDA
112 : CellTV & Others
Server 108 has more computing modules than client 106. The chip with most module presented in this application is the 4-PE chip.
Client 106 has fewer modules than server 108. Therefore it is one of either workstation chip(2 PEs + 2 VSs) or the visual statio chip(1 PE + 1 VS).
Interesting. Why does Suzuoki says that DTV will have more PEs than the workstation????
You got it wrong, from that patent, it should be something like this:
Broadband Engine chip = 4 PE
a visualisation chip = 4 VS
Workstation chip = 2 PE + 2 VS
Another lesser workstation chip= 1 PE + 1 VS
PDA chip = 1 VS
Good, than you noticed that a system in FIG 6, can't be a server because it has 4 VS or GS3 as you like to call it, attached to it, without going through the network.
Panajev2001a
Veteran
Re: ...
They will loose money on PlayStation 3 initially and yes you do have a thing for Sony, you do not like them and that is clear.
I have known you since 1998, so do not even think of pulling that excuse with me.
As soon as you are done pushing this "calm down, The goals SCE has proposed are not obtainable" and the first Xbox 2 news hit the internet you will proclaim his greatness to the 4 winds and how much faster it will be compared to PlayStation 3 and how all developers will jump ship.
Still, yes... you do not hate Sony, you loathe SCE.
DeadmeatGA said:To Paul
Yap. And PSX3 is no workstation, it is a mere $399 console. A console Kutaragi says doesn't intend on losing money on. He can't break even if he started putting a couple thousand dollar server chip into PSX3.
???Looks like a server to me.
Well, the patent application makes it clear that there are four different types of CELL ASICs planned, a server, a workstation, a low end visualstation(Most likely to be PSX3), and a PDA.
Accordingly, Suzuoki presents four different CELL ASIC configurations, the "Server" chip with 4 PEs, the "Workstation" chip with 2 PEs + 2 VSs, the "Visualstation" chip with 1 PE + 1 VS, and the PDA chip with 1 VS.
I don't hate Sony. I just want you to realize that you are not going to have a teraflop supercomputer in your home in time for Xmas 2005.
Let's recap what was actually said in the patent application
Devices identified on this CELL network
106 : Client Computer(The only one with visualizer attached(aka GS3)
108 : Server Computer
110 : CellPDA
112 : CellTV & Others
Server 108 has more computing modules than client 106. The chip with most module presented in this application is the 4-PE chip.
Client 106 has fewer modules than server 108. Therefore it is one of either workstation chip(2 PEs + 2 VSs) or the visual statio chip(1 PE + 1 VS).
Interesting. Why does Suzuoki says that DTV will have more PEs than the workstation????
They will loose money on PlayStation 3 initially and yes you do have a thing for Sony, you do not like them and that is clear.
I have known you since 1998, so do not even think of pulling that excuse with me.
As soon as you are done pushing this "calm down, The goals SCE has proposed are not obtainable" and the first Xbox 2 news hit the internet you will proclaim his greatness to the 4 winds and how much faster it will be compared to PlayStation 3 and how all developers will jump ship.
Still, yes... you do not hate Sony, you loathe SCE.
DeadmeatGA
Banned
...
To V3
EE3 will therefore have 2 PEs or less. My die area estimation shows 2 PEs or less per chip. Suzuoki's patent filing says 2 PEs or less per chip for non-server chips.
To V3
Yap. That 4-PE chip is the server.
EE3 will therefore have 2 PEs or less. My die area estimation shows 2 PEs or less per chip. Suzuoki's patent filing says 2 PEs or less per chip for non-server chips.
Re: ...
Uh huh. And how would a LAYMAN like you know anything about that anyway, huh?
This is total bogus. Current PC chips CANNOT turn off idle units, and only mobile versions slow down the clock rate, but not in any kind of dynamic fashion at the moment.
These features are not meant to give the CPU a 'breathing room' so it can cool down, they're meant to reduce power consumption so the battery in a portable lasts longer. If these features were there to give a breathing room, what would happen the first time you ran a program that loaded the CPU to a high degree over a prolonged period of time? The chip would overheat of course, roll over and die.
WAY TO GO, DEADMEAT! You're officially declared the worst computer engineer in history, which is no small feat since you're NOT any kind of engineer at all!
Umm, slightly warmer air will come out the back of the PS3?
You'd think the engineers at Sony would be smart enough to stick a powerful enough cooler on their chips, well unless your name is Deadmeat that is... Deadbeat's more like it I'd say...
HAHAHAHAHA! Yes, naturally, since you WANT PS3 to overheat, you WANT Sony to fail. So of course that's the only option you see.
*sigh*
This is why I constantly point out to you that you're no CMOS engineer but you fail again and AGAIN to see that I am right and you quite obviously are very, VERY wrong.
NO, there is no 'almost an quadratic' relationship between clock rate and power consumption. That relationship is QUITE linear. Ie, raise clock rate 10%, power consumption goes up 10%. Think of it like the engine of a car. Run it at 1000RPM, X liters of air is sucked into the engine every second. Raise RPM 10% and suddenly X+10% liters of air is needed.
What you do have is a non-linear relationship between power consumption and VOLTAGE.
You see your problem here? You look at a picture. You see clock rate stated and power draw stated at different speeds. Immediately your brain jumps to the conclusion clock rate causes power consumption to scale non-linearly when that actually isn't true at all! What you DIDN'T see in the picture is that to raise clock rate 66% the voltage to the chip is bumped too (probably by around half a volt), thus causing the non-linear development of power consumption! You take stuff out of context, confuse one thing with another or plain make shit up, mix it all into your crazy equations and come up with answers that are TOTALLY WRONG and make NO SENSE except in your own mind, then you try to use those bogus answers to prove your pet theories.
Obviously that doesn't work, but it never seems to stop you from trying again and again and...AGAIN. *sigh*
First of all, price hasn't been announced yet. It could be 499, or it could be 299. It could be 349 or anywhere inbetween. Second, I am fairly sure Sony don't intend to lose money on PS3 AS A WHOLE, they're undoubtedly ready to take a substantial financial hit on the hardware itself whilst making that up on software royalties. Third, the 'couple thousand dollar server chip' is entirely your fabrication and unsupported by anything even resembling facts. It's typical of you to take a figure out of thin air and insert it into an argument as if it was fact, and even keep using it again and again even after it's been pointed out to you (often more than once) it is a total fabrication.
Are you trying to get your made-up cost of a BB chip established as the truth through some kind of war of attrition or something?
I used to think you would eventually come to understand yourself that hundreds of professionals - many of which helped build the world's two most successful games consoles - bloody well should know better than one internet nutcase wether Cell and PS3 as a whole is a feasible project or not, but it's clear you're not heading in that direction. Instead it would seem you suffer from some kind of disorder where your own twisted reality makes more sense than the world as it ACTUALLY EXISTS around us. It's more sad than anything else really.
Thank you.
*G*
DeadmeatGA said:
Uh huh. And how would a LAYMAN like you know anything about that anyway, huh?
This is total bogus. Current PC chips CANNOT turn off idle units, and only mobile versions slow down the clock rate, but not in any kind of dynamic fashion at the moment.
These features are not meant to give the CPU a 'breathing room' so it can cool down, they're meant to reduce power consumption so the battery in a portable lasts longer. If these features were there to give a breathing room, what would happen the first time you ran a program that loaded the CPU to a high degree over a prolonged period of time? The chip would overheat of course, roll over and die.
WAY TO GO, DEADMEAT! You're officially declared the worst computer engineer in history, which is no small feat since you're NOT any kind of engineer at all!
Umm, slightly warmer air will come out the back of the PS3?
You'd think the engineers at Sony would be smart enough to stick a powerful enough cooler on their chips, well unless your name is Deadmeat that is... Deadbeat's more like it I'd say...
HAHAHAHAHA! Yes, naturally, since you WANT PS3 to overheat, you WANT Sony to fail. So of course that's the only option you see.
*sigh*
This is why I constantly point out to you that you're no CMOS engineer but you fail again and AGAIN to see that I am right and you quite obviously are very, VERY wrong.
NO, there is no 'almost an quadratic' relationship between clock rate and power consumption. That relationship is QUITE linear. Ie, raise clock rate 10%, power consumption goes up 10%. Think of it like the engine of a car. Run it at 1000RPM, X liters of air is sucked into the engine every second. Raise RPM 10% and suddenly X+10% liters of air is needed.
What you do have is a non-linear relationship between power consumption and VOLTAGE.
You see your problem here? You look at a picture. You see clock rate stated and power draw stated at different speeds. Immediately your brain jumps to the conclusion clock rate causes power consumption to scale non-linearly when that actually isn't true at all! What you DIDN'T see in the picture is that to raise clock rate 66% the voltage to the chip is bumped too (probably by around half a volt), thus causing the non-linear development of power consumption! You take stuff out of context, confuse one thing with another or plain make shit up, mix it all into your crazy equations and come up with answers that are TOTALLY WRONG and make NO SENSE except in your own mind, then you try to use those bogus answers to prove your pet theories.
Obviously that doesn't work, but it never seems to stop you from trying again and again and...AGAIN. *sigh*
First of all, price hasn't been announced yet. It could be 499, or it could be 299. It could be 349 or anywhere inbetween. Second, I am fairly sure Sony don't intend to lose money on PS3 AS A WHOLE, they're undoubtedly ready to take a substantial financial hit on the hardware itself whilst making that up on software royalties. Third, the 'couple thousand dollar server chip' is entirely your fabrication and unsupported by anything even resembling facts. It's typical of you to take a figure out of thin air and insert it into an argument as if it was fact, and even keep using it again and again even after it's been pointed out to you (often more than once) it is a total fabrication.
Are you trying to get your made-up cost of a BB chip established as the truth through some kind of war of attrition or something?
I used to think you would eventually come to understand yourself that hundreds of professionals - many of which helped build the world's two most successful games consoles - bloody well should know better than one internet nutcase wether Cell and PS3 as a whole is a feasible project or not, but it's clear you're not heading in that direction. Instead it would seem you suffer from some kind of disorder where your own twisted reality makes more sense than the world as it ACTUALLY EXISTS around us. It's more sad than anything else really.
Paul said:
Thank you.
*G*
DeadmeatGA
Banned
...
To Grall
1. PSX3 is going to be large, very large, since the coolers for CPUs have grown massive over the years.
2. PSX3 is going to come with a warning sticker reading "Hot, don't touch!"
1. Yield is low due to massive die size.
2. They don't get to sell too many of them.
The CELLserver faces exactly same problem, the yield will be low and Sony will sell limited quantity.
PSX2 launched at 40,000 yen.
PSX3 will therefore most likely launch at 40,000 yen since history repeats itself.
To Grall
And you have to be a CMOS engineer by chance? If not, HOW DO YOU KNOW THAT I DON'T KNOW?
When I said "Turn Off", I meant going into "sleep mode".
Actually this is what happens to some people(including me); run a demanding application(game) for a couple hours, and the CPU crashes due to overheating.
And you happen to be the opposite of me??? I don't know why you never come clean with your qualifications.
Ever felt the hot air coming out the back of a high-end PC constantly burning 70~80 watts of power for several hours??? You don't want that thing to sit on your TV, or let the kids touch it.
Which means,
1. PSX3 is going to be large, very large, since the coolers for CPUs have grown massive over the years.
2. PSX3 is going to come with a warning sticker reading "Hot, don't touch!"
If you are in low clock range, yes. If you are pushing the limits, hell no. This is a quadratic relationship, afterall.
Exactly. To go faster you need higher voltage, which in turn means far more power burned per MIPS.
How much do 400+ mm2 chips like Itanium2 and Power4 cost? $50??? Why do they charge so much for those server chips?? Two reasons
1. Yield is low due to massive die size.
2. They don't get to sell too many of them.
The CELLserver faces exactly same problem, the yield will be low and Sony will sell limited quantity.
PSX1 launched at 40,000 Yen.
PSX2 launched at 40,000 yen.
PSX3 will therefore most likely launch at 40,000 yen since history repeats itself.
Suzuoki patent clearly mentions and shows the block diagram of a "Server Chip"(widely mistaken as the EE3), and says in writing that this server chip has 4-cores, while others do not.
jvd, can we get a ban on Grall now???? He is doing it again.
Won't be any more than 300.
2. Okamoto SAID in the 2003 July EGM that PS3 would have 1tflops power.
3. You don't know how much BE will cost, give it up.
Not that I see. Remember also how sony is touting PS3 as a type of "server" that is home server.
SCEI doesn't make servers, I'm sorry.
Everything that has been said about PS3 has it based around a Teraflops, from Sony themselves, intensive articles, kutaragi. Recent news that Sony would shove multiple Cell's inside ps3(PE's). Infact Cell itself has only been touted as a teraflops chip.
And what about Figure 6 Deadmeat, you avoid this question. It is never stated what Figure 6 can be, a server? Don't make me laugh, why would a server need 4 VS?
Yea kinda too bad it never says Figure 6 to be a server. You know, figure 6 = two chip packages connected together. If figure 6 was a server they wouldn't say 4 PE could be a server, they would say Fig 6 because it's a example.
You need to read.
[0073] FIG. 7 illustrates a chip package for a BE 702 with two optical interfaces 704 and 706 for providing ultra high speed communications to the other members of network 104 (or other chip packages locally connected). BE 702 can function as, e.g., a server on network 104.
This was BE 702 THE SERVER EXAMPLE.
[0072] Using this standardized, modular structure, numerous other variations of processors can be constructed easily and efficiently. For example, the processor shown in FIG. 6 comprises two chip packages, namely, chip package 602 comprising a BE and chip package 604 comprising four VSs. Input/output (I/O) 606 provides an interface between the BE of chip package 602 and network 104. Bus 608 provides communications between chip package 602 and chip package 604. Input output processor (IOP) 610 controls the flow of data into and out of I/O 606. I/O 606 may be fabricated as an application specific integrated circuit (ASIC). The output from the VSs is video signal 612.
No server, because what they call a server HAS NO VS's nor does it comprise of two chip packages. The server is 702, this is something else, dare I say ps3.
Re: ...
Wait, so if my CPU can't turn off units or slow down when not in heavy use, why does it run hotter(and louder) during a game than while browsing the Internet?(no really, I'm clueless so if it's not one of those two things, what is it?)
BTW, why did the SNES have a cpu that could run at different clockspeeds? I don't think it had a problem with overheating or too much power draw....
Grall said:
Wait, so if my CPU can't turn off units or slow down when not in heavy use, why does it run hotter(and louder) during a game than while browsing the Internet?(no really, I'm clueless so if it's not one of those two things, what is it?)
BTW, why did the SNES have a cpu that could run at different clockspeeds? I don't think it had a problem with overheating or too much power draw....
Panajev2001a
Veteran
Only Banias can put in idle at the functional unit level: it was the first MPU designed by Intel with regards to power efficiency and good transistor usage.
Result ? It spanks the Pentium 4 core silly on a clock per clock basis and it has a quite low power consumption.
Current Pentium 4 does what is known as thermal throttling: if the chip gets too hot, the clock-speed is lowered.
CELL is designed to be power efficient, just like or better than Banias 1.0
How do you know the yelds will so low be when SCE launches PlayStation 3 ?
How do you know that they will sell limited quantities ?
Result ? It spanks the Pentium 4 core silly on a clock per clock basis and it has a quite low power consumption.
Current Pentium 4 does what is known as thermal throttling: if the chip gets too hot, the clock-speed is lowered.
CELL is designed to be power efficient, just like or better than Banias 1.0
How do you know the yelds will so low be when SCE launches PlayStation 3 ?
How do you know that they will sell limited quantities ?
nondescript
Regular
Let’s look at this objectively, okay? (Since this is long, I underlined points of interest)
What causes an IC to consume power? The switching of transistors. A transistor has a capacitance and a resistance. Every time it switches its logic state, it either charges or discharges, and since it is not a superconductor, the current through its resistance causes energy dissipation as heat. This is not a very precise model, but it is a first-order approximation that at least gives you the right idea.
If you’ve taken some EE, recall that charging and discharging a capacitor in series with a resistance requires twice the energy stored in the capacitor. The energy stored in the capacitor is the capacitance multiplied by operating voltage. Just do the integral if you don’t believe me. However, keep in mind it takes two clock cycles to switch a transistor on and off.
So therefore, the energy use per unit time of a transistor is:
Clock speed*capacitance*switching frequency*operating voltage.
Where switching frequency is a decimal from 0 to 1, where 0 is the transistor is never used, and 1 is if the transistor switches EVERY clock cycle.
One last thing: because of this resistance, a higher voltage will allow this capacitance to charge up more quickly, increasing the switching speed of the transistor, therefore allowing the processor to safely use a higher clock speed without going crazy. That’s why overclockers need to jack up the voltage a little sometimes. A corollary of this is that decreasing the resistance and/or decreasing the capacitance allows the same voltage to switch the transistor more quickly.
Now from theory to application:
Reducing transistor size decreases capacitance. This has all sorts of good effects, based on the stuff mentioned before. Reducing capacitance has a better than linear effect on power consumption, how much more I’m not too sure, but I can safely say that reducing capacitance by 50% will allow a greater than 50% reduction in power consumption (while getting the same performance).
Reducing resistance, by using low-k dielectrics, can allow the operating voltage to be reduced without reducing transistor switching speed. Lowering the operating voltage proportionally lowers power consumption.
Clock speed has a strictly linear effect on power consumption, a transistor that switches twice as many times will consume twice the power, assuming that the operating voltage remains the same. However, as I mentioned earlier, it is often necessary for overclockers to raise voltage to get the transistors to switch fast enough. In that case, it is quadratic.
A note on SOI. SOI is several hundred nm of single crystal Si on several hundred nm of silicon oxide (quartz), on a 400 micron substrate of Si. The advantage of building your IC on a big slab of oxide is reduction of leakage, because quartz is a good insulator. However, the downside is quartz doesn’t have great thermal conductivity, so the heat generated by the transistor will not dissipate quickly through to the substrate. I’m not familiar with IC packaging, so I can’t say how significant this is. However, copper heat pipes from the IC surface would handle this problem quite easily, since copper is ridiculously good at conducting heat.
Hope this clears up a few things.
(EDIT: Energy use per unit time is just a fancy way to say power, sorry about that.)
What causes an IC to consume power? The switching of transistors. A transistor has a capacitance and a resistance. Every time it switches its logic state, it either charges or discharges, and since it is not a superconductor, the current through its resistance causes energy dissipation as heat. This is not a very precise model, but it is a first-order approximation that at least gives you the right idea.
If you’ve taken some EE, recall that charging and discharging a capacitor in series with a resistance requires twice the energy stored in the capacitor. The energy stored in the capacitor is the capacitance multiplied by operating voltage. Just do the integral if you don’t believe me. However, keep in mind it takes two clock cycles to switch a transistor on and off.
So therefore, the energy use per unit time of a transistor is:
Clock speed*capacitance*switching frequency*operating voltage.
Where switching frequency is a decimal from 0 to 1, where 0 is the transistor is never used, and 1 is if the transistor switches EVERY clock cycle.
One last thing: because of this resistance, a higher voltage will allow this capacitance to charge up more quickly, increasing the switching speed of the transistor, therefore allowing the processor to safely use a higher clock speed without going crazy. That’s why overclockers need to jack up the voltage a little sometimes. A corollary of this is that decreasing the resistance and/or decreasing the capacitance allows the same voltage to switch the transistor more quickly.
Now from theory to application:
Reducing transistor size decreases capacitance. This has all sorts of good effects, based on the stuff mentioned before. Reducing capacitance has a better than linear effect on power consumption, how much more I’m not too sure, but I can safely say that reducing capacitance by 50% will allow a greater than 50% reduction in power consumption (while getting the same performance).
Reducing resistance, by using low-k dielectrics, can allow the operating voltage to be reduced without reducing transistor switching speed. Lowering the operating voltage proportionally lowers power consumption.
Clock speed has a strictly linear effect on power consumption, a transistor that switches twice as many times will consume twice the power, assuming that the operating voltage remains the same. However, as I mentioned earlier, it is often necessary for overclockers to raise voltage to get the transistors to switch fast enough. In that case, it is quadratic.
A note on SOI. SOI is several hundred nm of single crystal Si on several hundred nm of silicon oxide (quartz), on a 400 micron substrate of Si. The advantage of building your IC on a big slab of oxide is reduction of leakage, because quartz is a good insulator. However, the downside is quartz doesn’t have great thermal conductivity, so the heat generated by the transistor will not dissipate quickly through to the substrate. I’m not familiar with IC packaging, so I can’t say how significant this is. However, copper heat pipes from the IC surface would handle this problem quite easily, since copper is ridiculously good at conducting heat.
Hope this clears up a few things.
(EDIT: Energy use per unit time is just a fancy way to say power, sorry about that.)
Re: ...
Modern CPUs have crude powersaving features that stretch back quite a long way. When they do nothing, you can execute a HALT instruction which basically does just that. Stops the entire microprocessor.
This doesn't cut power consumption to zero, but it does reduce it significantly. However, this makes the entire CPU go to sleep, it doesn't stop an individiual ALU or FPU or anything like that. When the CPU wakes up, it ALL wakes up, including the FPU even if you don't run any FPU code.
Because...um... Well, because it was a rather quirky and archaic system, heh.
There were limitations on when it could run at a particular speed and such. I think it couldn't run at the fastest speed while it was showing graphics or some such like that... Like I said. Quirky.
*G*
Fox5 said:
Modern CPUs have crude powersaving features that stretch back quite a long way. When they do nothing, you can execute a HALT instruction which basically does just that. Stops the entire microprocessor.
This doesn't cut power consumption to zero, but it does reduce it significantly. However, this makes the entire CPU go to sleep, it doesn't stop an individiual ALU or FPU or anything like that. When the CPU wakes up, it ALL wakes up, including the FPU even if you don't run any FPU code.
Because...um... Well, because it was a rather quirky and archaic system, heh.
There were limitations on when it could run at a particular speed and such. I think it couldn't run at the fastest speed while it was showing graphics or some such like that... Like I said. Quirky.
*G*
randycat99
Veteran
I think nondescript blew the lid off of this with his last post.
DMGA does not seem to recognize the operational difference between a CPU designed from the process up to work at a particular clockrate and one that has been severely overclocked by a DIY'er.
DMGA does not seem to recognize the operational difference between a CPU designed from the process up to work at a particular clockrate and one that has been severely overclocked by a DIY'er.
Panajev2001a
Veteran
nondescript said:
Thank you for taking some time and doing what other ECE guys should have done too ( me = lazy
).You presented the material very well
Capacitance does increase a bit shrinking to a smaller manufacturing process as you are not only shortening the gate, but the wires that connect transistors.
You tend to create more capacitance as transistors will be closer together and the capacitance effect generated will be higher.
Not a problem though, add this with their SOI process, Toshiba is now able to omit the capacitor in their 45 nm e-DRAM cell designs.
No problem . To give you an idea i had an athlon 2000xp running at 2.1ghz with a 172watt tec(peliter) The chip was running at 11c . The tec was running at 73c . After a time the noise of running 4 120mm fans at full volt to cool the radiator was just way to much. Took off the tec . Ran it at 1.9ghz and the chip ran at 42c. and the 4 120mm were running very low volt. So i barely heard them and when i wasn't playing games i could shut off 2 of the fans. Right now everything i use is watercooled and ihear my hardrives spin and thats it .PC-Engine said:Ah I see, thanks for that bit of info jvd
Yawn once again. Cell will be able to run at 1tflop. Cell is scalable from 1mhz up to whatever the max will be. Cell will be in ps3. Cell in ps3 does not mean it will run at 4ghz and give 1tflop.Paul said:
I can use your logic and say. Ati will be in the xbox2. Ati is currently working on th r700. The r700 will be in the xbox 2. The first two are true. The 3rd one isn't . Just like the conclusion you came to up on top. Its market speak paul.
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