ST-Ericsson Nova A9600: dual-core ARM A15, PowerVR Series 6

[Deleted member 13524]

U9500 is the same chip, just with the baseband disabled and coupled with the 21Mbps M5730 baseband (maybe they did later made a separate chip without the baseband to reduce costs but either way GPU frequency shouldn't be different - there might be multiple SKUs with different frequencies though, so I don't know for sure that this device has the GPU at 400MHz).

Really? I thought this sentence made it very clear that it was two different chips:

In any case the Nova A9600, A9540, A9500 are not just dual core processors, they are indeed very sophisticated heterogeneous multi-core systems including up to 10 dedicated processor cores for imaging, video, 2D graphics, 3D graphics, sensor control and power management.

Since the A8500 is notoriously absent in that sentence, I thought the A9500 would have different specs like cache amounts, different imaging/video processors, maybe dual-channel memory controller and such.

 

[Arun]

Since the A8500 is notoriously absent in that sentence, I thought the A9500 would have different specs like cache amounts, different imaging/video processors, maybe dual-channel memory controller and such.

You're reading too much into that - I suspect they focused on the A9500 there because that's what they were most eager to sell (the U8500's integrated 14.4Mbps baseband based on Nokia IP doesn't seem to be best-of-class whereas the M5730 definitely is). I am absolutely certain that the U8500/A9500/U9500 all have identical application processing specs (e.g. single-channel 800MHz LPDDR2 with 512KB of L2) although I suppose they might have slightly different SKUs - the big changes are only coming in the 32nm A9540 which is indeed very different in many ways.

 

[upnorthsox]

Figured I just throw this in here, ST-Ericsson's 3d chip:

http://eda360insider.wordpress.com/...the-advanced-notes-can-you-say-tour-de-force/

And:

http://www.cadence.com/Community/bl...ig-step-up-for-3d-ics-with-tsvs.aspx?CMP=home

 

[Lazy8s]

The notion I had that the base Rogue core has four TMUs never sat well with me, and I now agree it must instead have two TMUs, with the A9600 being a monster quad-core targeted up to 600+ MHz.

I figure each core still has 16 Z units, like Series 5XT.

 

[Ailuros]

The notion I had that the base Rogue core has four TMUs never sat well with me, and I now agree it must instead have two TMUs, with the A9600 being a monster quad-core targeted up to 600+ MHz.

I figure each core still has 16 Z units, like Series 5XT.

545 and 5XT cores have all 16 z check units afaik. However Series5 started out at 8 z units and scaled upwards from there. I'd say that Rogue most likely will have for the beginning 16z/core and if there's a need depending on target market more than those down the line. Albeit a desktop GPU KYRO's had 32 z/pipeline and I think but am not sure anymore that higher end vaporware like the PMX590 might have had 64z.

 

[Lazy8s]

Dreamcast had a 32x32 tile size, too.

While mobile parts are designed for smaller die sizes and SRAM does eat up many times more transistors than eDRAM, I believe 32+ Z units wouldn't be unreasonable for such a core if the gain in lowered parameter bandwidth and increased HSR/stencil performance called for it.

 

[Ailuros]

Dreamcast had a 32x32 tile size, too.

Series3 was at 32*16 if memory serves well; could be they're still using for micro tiling rectangular tiles these days.

While mobile parts are designed for smaller die sizes and SRAM does eat up many times more transistors than eDRAM, I believe 32+ Z units wouldn't be unreasonable for such a core if the gain in lowered parameter bandwidth and increased HSR/stencil performance called for it.

If we'd be talking about a higher end multi-core config most likely yes. PS Vita's MP4 has in total 64z units too; one might argue that they're spread over 4 cores but then again under normal conditions each core is processing only a portion of a frame.

 

[tangey]

Timeframe for the A9600 seems to be slipping back.

http://www.electronicsweekly.com/bl...or-blog/2012/02/where-will-st-e-get-28nm.html

Article asks if the delay is due to foundry issues, and ST-E rep states that chip will sample end of this year and that foundry hasn't been finalised.

All very strange, when global foundries handed STM/ST-E a tech award for the A9600 back in August '11 stating that it was "planned for production on GLOBALFOUNDRIES’ 28nm-SLP technology."

http://www.globalfoundries.com/newsroom/2011/20110830_Awards.aspx


So is it globfol or not ?, is ST looking elsewhere because globfol is having problems @ 28nm ?

 

[Lazy8s]

Ouch. Sounds like Apple's A7 may indeed be the debut for Series6.

 

[tangey]

Here's a video showing medfield Vs ST's A9540 running an IMG graphics benchmark. the 9540 gets about 50% increase in frames, running higher res, with more effects.

Reference on this video and elsewhere suggest that STs A9540 platform is running single core SGX544 (I had thought I'd heard dual core from somewhere).

http://www.theverge.com/2012/3/9/28...ologies-gpu-face-off-powervr-sgx540-vs-sgx544

 

[french toast]

Well i thought the SGX544 was just the same as SGX543..just with added dx 9.3 support?? as the Intel derived version clocks @ around 400mhz? then i would think thats the duel core version we are seeing in the Novathor.

 

[tangey]

Well i thought the SGX544 was just the same as SGX543..just with added dx 9.3 support?? as the Intel derived version clocks @ around 400mhz? then i would think thats the duel core version we are seeing in the Novathor.

Medfield uses SGX540.

Single core 543/544 is more powerful that single core 540 @ the same clock.

As I recall in terms of polys/s it is something like 35M V 20M @ 200Mhz

 

[Ailuros]

Medfield uses SGX540.

Single core 543/544 is more powerful that single core 540 @ the same clock.

As I recall in terms of polys/s it is something like 35M V 20M @ 200Mhz

Not only in terms of polygons/sec. SGX540 has 8 z/stencil and up to 4 FLOPs/ALU (Vec2) while SGX543/4 have 16 z/stencil and up to 9 FLOPs/ALU (Vec4+1?). A conservative estimate would be about 40% average performance difference between the two at same frequencies.

 

[Lazy8s]

Yep, and ST Ericsson's SGX544 there will clock at 500 MHz while Medfield's SGX540 clocks 400 MHz.

 

[rpg.314]

So when do devices with this beast (A9600) get here?

 

[Erinyes]

So when do devices with this beast (A9600) get here?

Mid 2013?

 

[rpg.314]

I was hoping it would happen a bit earlier.

 

[Erinyes]

I was hoping it would happen a bit earlier.

Oh that was purely a guess on my part, i dont have any real info

But by all indications it seems to have been delayed. Apple's A6 may very well be the first shipping implementation of Rogue.

 

[tangey]

Be nice if ST-E could get ANY img-ed socs to market (rogue or otherwise).

I see a new one is now being talking about L8580 running sgx544 @600mhz, which is the highest clock I've seen for series 5. Sampling end of the year, if you can beleive it.

http://www.cnx-software.com/2012/07...novathor-l8580-dual-core-cortex-a9-processor/

 

[Ailuros]

PowerVR SDK 3.0 is out: http://withimagination.imgtec.com/i...-the-newly-released-powervr-graphics-sdk-v3-0

Updated performance recommendations: http://www.imgtec.com/powervr/insider/docs/PowerVR.Performance Recommendations.pdf