RV560/570 Gemini roadmap
- Thread starter kemosabe
- Start date
Nearly. X1300 XT is 12/4/4!
vertex_shader
Banned
"Diamond Multimedia (www.diamondmm.com), a leading manufacturer of PC graphics cards, sound cards and communications products, will begin shipping three new versions of its popular Viper video card line on September 14, including the X1950 CrossFireâ„¢ & X1950XTX in PCI-E models along with the X1950PRO available in an AGP version."
"Diamond Ships Six New Viper Cards
The X1950AGP model has a 256MB GDDR4 interface, core clock speed of 600MHz and a 1.4 GHz memory speed (Due Oct 2006). All these products support Dual DVI (x2 Dual-link), HDTV, D-sub, VIVO and Avivo."
http://www.diamondmm.com/p091206.php
"Diamond Ships Six New Viper Cards
The X1950AGP model has a 256MB GDDR4 interface, core clock speed of 600MHz and a 1.4 GHz memory speed (Due Oct 2006). All these products support Dual DVI (x2 Dual-link), HDTV, D-sub, VIVO and Avivo."
http://www.diamondmm.com/p091206.php
Jawed
Legend
Hmm, according to this:
http://www.techreport.com/onearticle.x/10789
RV570 is 80nm. I've honestly lost track of what previous rumours have suggested.
That would obviously increase transistor count somewhat: 330M transistors? But do we care, huh?
Jawed
Anyone care to guess why ATi is using 2 bridge connectors?
Is it only to ensure full speed AA? Triple CrossFire sounds a bit dodgy (SFR/AFR with three cores?) and CrossFire physics doesn't need a physical connection between the regular GPU and physics GPU. Or could it be something else, like making CrossFire cross-vendor compatible so it will work on every available chipset around that supports two physical 16x PCIe slots?
I read somewhere that ATi's version of the bridge was a 2-way bridge. So could it be that on SLI chipsets or (future) Intel chipsets GPU1 sends all the data through bridge1 to GPU2 which then renders his part and sends the data back through bridge2 to GPU1 which merges it into 1 image? That way no data would have to pass through the second PCIe 16x slot to the vidcard2 and the GPUs wouldn't need the PCIe bus to communicate with eachother. Or is that just wishful thinking?
Btw, the new X1900GTs have already made an appearance. On Dutch forum Gathering of Tweakers one poster has just posted pics of his new X1900GT which sports the new cooler and also shows CrossFire connectortraces on the PCB:
http://img97.imageshack.us/my.php?image=dsc01023kn6.jpg
http://img125.imageshack.us/my.php?image=dsc01021wo5.jpg
Source: http://gathering.tweakers.net/forum/list_message/26493019#26493019
Is it only to ensure full speed AA? Triple CrossFire sounds a bit dodgy (SFR/AFR with three cores?) and CrossFire physics doesn't need a physical connection between the regular GPU and physics GPU. Or could it be something else, like making CrossFire cross-vendor compatible so it will work on every available chipset around that supports two physical 16x PCIe slots?
I read somewhere that ATi's version of the bridge was a 2-way bridge. So could it be that on SLI chipsets or (future) Intel chipsets GPU1 sends all the data through bridge1 to GPU2 which then renders his part and sends the data back through bridge2 to GPU1 which merges it into 1 image? That way no data would have to pass through the second PCIe 16x slot to the vidcard2 and the GPUs wouldn't need the PCIe bus to communicate with eachother. Or is that just wishful thinking?
Btw, the new X1900GTs have already made an appearance. On Dutch forum Gathering of Tweakers one poster has just posted pics of his new X1900GT which sports the new cooler and also shows CrossFire connectortraces on the PCB:
http://img97.imageshack.us/my.php?image=dsc01023kn6.jpg
http://img125.imageshack.us/my.php?image=dsc01021wo5.jpg
Source: http://gathering.tweakers.net/forum/list_message/26493019#26493019
Last edited by a moderator:
chavvdarrr
Veteran
Nearly. X1300 XT is 12/4/4!
and what about X1650XT (or is it x1700 now?!)
Anon Lamer
Newcomer
GDDR4 on the bottom X1950 model? Is it already mainstream?
24/8/8 IIRC.
trumphsiao
Regular
What Hkepc stated that RV570 have same Die Size of R580 is virtually wrong.
less than 65% R580 Die Size for sure.
less than 65% R580 Die Size for sure.
vertex_shader
Banned
They removed the x1950pro agp part.
Last year diamond already made a mistype with the x1800AGP
trumphsiao
Regular
sorry to tell you guys. Die Size of RV560 is bigger than that of G71.
Dunno why, maybe RV560 is cripple RV570.
Dunno why, maybe RV560 is cripple RV570.
R580 is nearly square. RV570 from that piccie is clearly narrower across the top than it is down the side.
Maybe RV570 is 80nm and RV560 is 90nm?
trumphsiao
Regular
both of them are 36ALU DX9 chips.except Clock speed and MC difference.
trumphsiao
Regular
dunno why RV560 have bigger than G71 die size.
Hmmm. Let me do a little back of the envelope scratching...
Interpolating between R580 and RV530 we have:
Code:
Size (mm2) Chip
150 RV530 on 90nm
352 R580 on 90nm
196 G71 on 90nm
217 RV560 on 90nm interpolation
285 RV570 on 90nm interpolation
172 RV560 on 80nm?
225 RV570 on 80nm?So it does seem RV560 should be smaller than G71 based on an interpolation using only the number of pixel shader units. So I am going to guess that there is more in there, such as a compositing circuit.
Please anyone feel free to correct my errors/wrong assumptions.
ERK
dunno why RV560 have bigger than G71 die size.
My guess, probably, it might concern the ring-bus programmable memory controller on the RV560. If it happens to be the same controller as R520, it would take a big area on the core (as I remembered that the MC of R520 takes quite big area on core too, please anyone correct me if it is wrong).