Nobody asked you for these links and the discussion was never about tile-based GPUs in the first place. I am perfectly aware of how tile-based GPUs reduce memory accesses by using tiling, which have been used for decades not only in the GPUs but also as a general software optimization. Doubt HW tiling used anywhere today besides particle rendering on modern GPUs, because you still need to store the buffer with all the vertices prior to tiling the screen, and unless the buffer fits into the cache, it's not feasible. The more vertices you need to store, the worse it gets. Even if tilers had any advantages for G-Buffer rendering in modern applications, which I sincerely doubt, they would be outweighed by the minimal time spent in G-Buffer passes in modern games. You can’t achieve a 10x speedup by accelerating a 2-3 ms fraction of a frame. You don't even need the heavy machinery that comes with the complex TDBR as modern games are not primarily limited by memory-bound passes. That’s why, as I mentioned earlier, even classic rasterization (and, for god's sake, by rasterization, I meant the entire pipeline, not just the G-Buffer/Depth or shadowmaps passes) is not generally limited by memory bandwidth.