PlayStation 4 (codename Orbis) technical hardware investigation (news and rumours)

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Heat sink has 50 fins of about 30x70mm plus floor and ceiling of 100x60mm
So about 118,000 mm2 of surface for the main heatsink. It also conduct heat through the metal shielding on both sides, which is not a negligible surface.

XB1 has a similar surface area for it's main heatsink (60 x 125mm x 15mm), no help from shield surfaces, but a lower wattage. I'm curious how close the air flow needs are between the two consoles.
 
The shielding is going to have pretty minimal effect. Sheet steel is obviously made of metal, but still isn't an awesome heat conductor, especially since it's so incredibly thin. There's going to be a lot of thermal resistance in that material compared to a proper heatsink. You can drain off some heat from low-power devices like the GDDR5 with the RF shield, but don't expect miracles sinking high-wattage customers like the APU... :)

Without going all "versus", the xbone heatsink seems like a pretty simple extruded aluminium sink; without integrated heatpipes there probably won't be that much heat making it all the way out to the tips of the spiralled fins. Xbone's fansink is large(r) than PS4's, but may be more inefficient unless there's additional features we're not aware of at this stage.
 
Ok it's not a lot, but at the very least, the shielding is taking care of the GDDR5, so maybe 16W which the main heat sink doesn't have to.
 
You sure each GDDR actually burns 2W? Consider that the RAM on the rear side of Nvidia Titan boards don't have any cooling at all, and they run at a higher clock than PS4's.
 
You sure each GDDR actually burns 2W? Consider that the RAM on the rear side of Nvidia Titan boards don't have any cooling at all, and they run at a higher clock than PS4's.
I'm not sure what the figure is, I was thinking 2W per sandwich pair, each chip would be about 1W.

http://www.samsung.com/us/business/oem-solutions/pdfs/Green-GDDR5.pdf
The samsung presentation says 11.8W for a 256bit interface @ 4Gbps 1.5v, I padded up roughly to 16W because it's 5.5. No idea if splitting into clamshell changes anything.
Is it possible that they are counting both ends of the interface in this presentation?

GDDR5 gets a nice resistance of 12 deg.C/W die-to-PCB, I guess that can help cool the back side? The clamshell has most of it's 170 pins on filled vias, they really hug each other.
 
Our estimates of the XB1 APU were high (~410mm^2 vs the MS number of 363mm^2), since we are using the same techniques maybe we are overshooting again?
We can only compare respective package sizes of the chips, of course. Die sizes will always be somewhat smaller.

Based upon the respective pictures posted on wired.com, I did a quick comparison by applying the same perspective correction to both images - and scaling both images to 1px = 0,1mm (using the G/DRR sizes) [it's a little tricky to account for the rounded corners of the Orbis/Liverpool-package - I tried to go by the vertex of the roundings when measuring].

2qibkuo.jpg


I.e. based on package size it's (very roughly) ~400mm² vs. ~360mm²; but the chips obviously use different packaging ... so that result might be slightly deluding in the one or other direction.
 
Has anyone been able to ID the Samsung Memory Chip next to the Secondary Chip?

I'm guessing it's a 512MB chip?


dram-1.jpg
 
Has anyone been able to ID the Samsung Memory Chip next to the Secondary Chip?

I'm guessing it's a 512MB chip?
I tried to read the markings until my eyes bled, it's just a blob of pixels :LOL:

From the picture it's 7.5mm x 13mm so it matches ANY 16 bit DDR3 chip.
The smallest possible is 128MB, and the largest would be 1GB.

But even if it's 256MB, that makes a very good I/O buffer.

128MB : K4B1G1646G
256MB : K4B2G1646E or K4B2G1646C
512MB : K4B4G1646B
1GB : K4B8G1646B

I think it ends with E, so that would be the 256MB K4B2G1646E, but it's so fuzzy it's like a Rorschach Test.
 
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I.e. based on package size it's (very roughly) ~400mm² vs. ~360mm²; but the chips obviously use different packaging ... so that result might be slightly deluding in the one or other direction.

Nice, but if that ~400mm² ended up being 363mm², then what might the ~360mm² be in reality?
 
I tried to read the markings until my eyes bled, it's just a blob of pixels :LOL:

From the picture it's 7.5mm x 13mm so it matches ANY 16 bit DDR3 chip.
The smallest possible is 128MB, and the largest would be 1GB.

But even if it's 256MB, that makes a very good I/O buffer.

128MB : K4B1G1646G
256MB : K4B2G1646E or K4B2G1646C
512MB : K4B4G1646B
1GB : K4B8G1646B

I think it ends with E, so that would be the 256MB K4B2G1646E, but it's so fuzzy it's like a Rorschach Test.

Look too smooth to be a E

Edit: never mind I was looking at the last part.
 
If I understand correctly... The fan is rotating in the opposite direction as the PS3 Slim, it's rotating toward the wall instead of toward the center, so it creates a high pressure area which I thought was very weird. But the heat sink has a different density in the high pressure area, creating more resistance. They are tuning the fin spacing for maximum efficiency, and if all goes well it should make the flow equal all around. This is really brilliant!

Like all PS3 models, the fan blades are inclined backward which help produce more pressure, so it can feed a dense heat sink efficiently at a lower RPM.

The intakes are both above and below the fan, this reduces the intake air speed by half, so less turbulence noise.

eby3.png
 
So how exactly is it that the PS4 can, as a whole, be significantly smaller than the competitor (with an internal power brick vs external) and still command a technical advantage?

I'm asking this as a complete novice, I honestly do not understand how there can exist any kind of size disparity between the two.

Should the PS4 APU not be bigger?
 
Reason is most likely that Sony spent more R&D on the internal layout of their console and actually paid attention to things like directed airflow/air paths and so on. MS just chucked a bigish fansink on their APU, stuck all of it in a huge plastic case and called it a day.
 
So how exactly is it that the PS4 can, as a whole, be significantly smaller than the competitor (with an internal power brick vs external) and still command a technical advantage?

I'm asking this as a complete novice, I honestly do not understand how there can exist any kind of size disparity between the two.
Simply put that is what Sony does best. Then there are issue with DDR3 the traces on the mobo for every single memory chip needs to be the same length, that constrain doesn't exist with GDDR5.
Should the PS4 APU not be bigger?
Pitcairn which include 20 CUs and 32 ROP and a 256 bit bus memory interface is 212mm^2 according to AMD. Looking at kabini die shot one can see that a jaguar cluster is not big at all.
It would not surprise me if the SoC is 300mm^2 give or take. Actually I though it was bigger than expected.
 
So how exactly is it that the PS4 can, as a whole, be significantly smaller than the competitor (with an internal power brick vs external) and still command a technical advantage?

I'm asking this as a complete novice, I honestly do not understand how there can exist any kind of size disparity between the two.

Should the PS4 APU not be bigger?


Because Xbox One SoC has eSRAM & the Shape/other Audio Chip on the Die while the PS4 will use GDDR5 off the chip so it doesn't need eSRAM to make up for slow main RAM & I'm guessing the PS4 Audio Chip isn't as big as the Shape & other Audio Chip in the Xbox One SoC.
 
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