Li Mu Bai said:not to mention the external memory requirements for essentially a stream processor, ala the PS3 & its subpar random memory access for this type of full application.)
IIRC XDR-DRAM is not bad in random access
Li Mu Bai said:not to mention the external memory requirements for essentially a stream processor, ala the PS3 & its subpar random memory access for this type of full application.)
one said:Li Mu Bai said:not to mention the external memory requirements for essentially a stream processor, ala the PS3 & its subpar random memory access for this type of full application.)
IIRC XDR-DRAM is not bad in random access
version said:yeah, but xdr access 32 bit(32wire) , gddr3 have 256wire =256 bit about same time
gddr3 faster 8 times than xdr
XDR memory's novel system topology allows point-to-point differential data interconnects to scale to multi-gigahertz speeds, while the bussed address and command signals allow a scalable range of memory system capacity supporting from one to 36 DRAM devices. XDR offers a roadmap to 6.4GHz and can scale to interface widths of up to 128-bits, enabling memory system bandwidths up to 100GB/s, 16 times more than today?s 6.4GB/s memory systems. XDR DRAMs will be available in multiple speed bins, device densities, and device widths. With densities ranging from 256Mb to 8Gb, and device widths ranging from x1 to x32, XDR DRAM satisfies the needs of both high-bandwidth and high-capacity systems.
Samsung, Elpida, and Toshiba are all DRAM licensees of Rambus's latest memory interface technology.
one said:version said:yeah, but xdr access 32 bit(32wire) , gddr3 have 256wire =256 bit about same time
gddr3 faster 8 times than xdr
No way. XDR supports up to 128bit interface width (16 * 8-channel). Also, XDR is 2.5x faster per-pin than GDDR3 in 2005.
http://www.rambus.com/news/newsroom/pressrelease.cfm?id=110
XDR memory's novel system topology allows point-to-point differential data interconnects to scale to multi-gigahertz speeds, while the bussed address and command signals allow a scalable range of memory system capacity supporting from one to 36 DRAM devices. XDR offers a roadmap to 6.4GHz and can scale to interface widths of up to 128-bits, enabling memory system bandwidths up to 100GB/s, 16 times more than today?s 6.4GB/s memory systems. XDR DRAMs will be available in multiple speed bins, device densities, and device widths. With densities ranging from 256Mb to 8Gb, and device widths ranging from x1 to x32, XDR DRAM satisfies the needs of both high-bandwidth and high-capacity systems.
Samsung, Elpida, and Toshiba are all DRAM licensees of Rambus's latest memory interface technology.
version said:
yes, xdr faster in burst mode, but with random access slow
ps3 have 32 or 64 bit(wire) for xdr
Qroach said:Little work? so which is it that you want to argue for? on one side you argue they are providing tools and software and on the other you argue little work/effort. The two really don't go together. providing tools and software is a lot fo continuous work, once you can't describe as little "work/effort". Nvidia always designs a chip that will last for years to come.
one said:version said:
yes, xdr faster in burst mode, but with random access slow
ps3 have 32 or 64 bit(wire) for xdr
No, the expected bandwidth for the PS3 memory configuration is
256MB XDR DRAM (3.2Gtps) (256Mbit * 8 @ 128bit) = 51.2GB/s
or
128MB @ 64bit for Cell + 128MB @ 64bit for GPU = 25.6GB/s + 25.6GB/s
while Xenon is
512MB GDDR3 (1.6Gtps) (512Mbit * 8 @ 256bit) = 51.2GB/s
or
256MB GDDR3 (256Mbit * 8 @ 256bit) = 25.6GB/s
Anyway, read the picture above "Optimized XDR core timings yield higher effective bandwidth under random workloads"
version said:PSP has 32MB ram+8MBflash, PS3 128MB?? HUMOUR!
version said:1. 256MB with 25GB/s
2. 512MB with 50GB/s
3. 1024MB with 100GB/s
one said:version said:PSP has 32MB ram+8MBflash, PS3 128MB?? HUMOUR!
PSP = $185 including LCD
PS3 = $? including Cell, media processor, Blu-ray drive, whatsoever
version said:1. 256MB with 25GB/s
2. 512MB with 50GB/s
3. 1024MB with 100GB/s
What are those numbers? If you assume 512MB XDR DRAM, the total bandwidth are 100GB/s.
version said:1. 256MB with 25GB/s
2. 512MB with 50GB/s
3. 1024MB with 100GB/s
bandwith x memory module.london-boy said:Why do you keep scaling memory size proportionally with Bandwidth?
london-boy said:version said:1. 256MB with 25GB/s
2. 512MB with 50GB/s
3. 1024MB with 100GB/s
Why do you keep scaling memory size proportionally with Bandwidth?
Because it's so much easier to delude oneself that it's a 3.5Ghz Power5 with 3 cores and thus supercomputer equivalent?DeanoC said:Why do some people have a problem that XeCPU is a clean design, designed and built from scrarch for this one job.
Fafalada said:Because it's so much easier to delude oneself that it's a 3.5Ghz Power5 with 3 cores and thus supercomputer equivalent?DeanoC said:Why do some people have a problem that XeCPU is a clean design, designed and built from scrarch for this one job.
Fafalada said:Because it's so much easier to delude oneself that it's a 3.5Ghz Power5 with 3 cores and thus supercomputer equivalent?DeanoC said:Why do some people have a problem that XeCPU is a clean design, designed and built from scrarch for this one job.
ERP said:Fafalada said:Because it's so much easier to delude oneself that it's a 3.5Ghz Power5 with 3 cores and thus supercomputer equivalent?DeanoC said:Why do some people have a problem that XeCPU is a clean design, designed and built from scrarch for this one job.
That and MS hasn't done enough declaring it to be a huge leap in computing architecture.
People believe what they want to believe even when there are real facts to dispute their beliefs, so in this case where there is no solid info it's hardly surprising.
MS should declare specs and features not how 'a huge leap is their CPU'.ERP said:That and MS hasn't done enough declaring it to be a huge leap in computing architecture.