NVIDIA Kepler speculation thread

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2134279g26mu2o6zorgji0tjrp.jpg
 
~356 mm² (?)
Resolution is quite limited, so error can be pretty significant.
Yes, that's about the number I arrive at, too. The die is slightly larger than twice the size of a memory chip, which measures 12x14=168mm².

Just counting pixels in a amateurish attempt of rectifying the picture, I get ~349mm² (which has indeed a quite high error margin due to the limited resolution). But it probably means that Charlie was not far of with his 18.5x18.5=342mm² die.

Edit: So the "marketing die size" could be about Cypress size, i.e. 330ish.
 
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fellix: Did you take perspective into account? SLI connectors ar more distant than the GPU. I made several comparisions and I'm getting 340-356 mm².
 
fellix: Did you take perspective into account? SLI connectors ar more distant than the GPU.
That by itself would enlargen the apparent die size. I would suspect the rounded edges of the connectors as the source of discrepancy. The memory chips and the die have hard edges, which makes it easier to get it right. But it doesn't solve the low resolution problem. I would put at least a 15mm² margin on every number derived from that picture, just by the +/- 1 pixel uncertainty to determine the edge of the chips. As one does it twice, it's actually even larger in the worst case.
 
Quick photochopping tells that the die is roughly 1.33 times (or 1.53 times the height) the width of GDDR5 memory module, and roughly square, so what's the width of GDDR5 module?
 
Quick photochopping tells that the die is roughly 1.33 times (or 1.53 times the height) the width of GDDR5 memory module, and roughly square, so what's the width of GDDR5 module?
As said above, a GDDR5 BGA170 module measures exactly 12x14=168mm².

Taking your (not perfectly consistent) numbers, you also arrive in the 340ish mm² ballpark.
 
As said above, a GDDR5 BGA170 module measures exactly 12x14=168mm².

Taking your (not perfectly consistent) numbers, you also arrive in the 340ish mm² ballpark.

Missed it :oops:

But anyway, yes, I arrived at around those numbers too, that was on quick photochopping on lowresolution image though, the measuring that is, so there's about 1-2 px thresold in just that, let alone how much the low res affects everything

But aside from that, we can quite safely conclude that it's smaller than Tahiti for sure - has nVidia managed to not only catch but also pass AMD on the perf/mm^2 front, and do it with ~1/3rd the mem bandwidth, or is it safe to say GK104 can't challenge Tahiti outside nVidia handpicked (GPU PhysX) situations?
 
Why everybody counting package area as silicon die area? Package itself take some area at least because it has height somewere around 1mm above substrate
 
If it's supposed to be trading blows with Tahiti, why wouldn't it be?
Because rumors say it's 256bit?

Which Tahiti exactly for one and directly after that since when does buswidth by itself define a GPU's performance? What a surprise Cayman had a 256bit bus yet was on average about 15% behind a GF110 with a 384bit bus.

***edit: and just for the "rumor's" sake I count 8 memory chips on that picture above.
 
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