Well, NVIDIA isn't focused on handheld markets with Tegra and Fermi's compute specific features, because they have no competition at all and can live with profits from the graphics market only...
NVIDIA GF100 & Friends speculation
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Well, NVIDIA isn't focused on handheld markets with Tegra and Fermi's compute specific features, because they have no competition at all and can live with profits from the graphics market only...
Jawed
Legend
[QUOTE="Evergreen ISA" ]SET_MODE
Overrides the rounding and denorm modes until the end of clause.
Round modes are:
• Round to nearest
• Round toward 0 (truncate)
• Round toward +infinity
• Round toward -infinity
Denormal handling:
• single_denorm_flush_input (on/off)
• single_denorm_force_underflow_to_zero (on/off)
• double_denorm_flush_input (on/off)
• double_denorm_force_underflow_to_zero (on/off)[/QUOTE]
NVidia could have 1/4 rate DP using the same trick ATI has. And put MUL32 in the special function ALU.If nv had no int pipeline, their dp throughput would be 1/8 sp from just the fp pipes.. No wonder they had to add the int path just to reach respectable dp performance. May be Fermi3 will make all the 4 pipes identical (both spfp and int32) and quad-issue warps every clock. Otherwise, the INT32 pipe seems rather unnecessary. And
But it seems NVidia wants 1/2 rate DP + full speed MUL32 (low or hi, half speed full result).
Jawed
cypress has twice the alu's. Each alu is just as fast on both rv770 and cypress.
Who is at the second front? First was intel with the GPGPU and second is the "tessellation" front. But who is/was the competitor?
I said may:
So about your statement:
So what exactly are you waiting for? Perhaps you should improve a little in reading comprehension.
So about your statement:
So what exactly are you waiting for? Perhaps you should improve a little in reading comprehension.
Jawed
Legend
I suspect 16384² is the source of this limitation because of byte addressing, since the hardware can't work with larger textures. But everything's so vague...
Jawed
Oh yeah, brainfart
Seems like a good idea for mainstream parts.
Which *is* overkill for graphics. AMD's approach seems more area efficient in the sense of $/mm aka balance b/w frequency-of-use vs. area. Is there a use case for int32 which I have missed?
With this in mind, I have to say, GF100 looks dp-heavy (by an appreciable amount) for a gpu.
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IMHO, AMD should get rid of this in Evergreen+1.
Jawed
Legend
Jawed
Legend
Ever since G80 NVidia's been doing overkill: monstrous counts and/or sizes of units - it just took a while to realise it.
I'm intrigued at the thought that if GF100Ax has half its TMUs turned off, then B1 might have them deleted, leading to a smaller, less power-hungry, die.
It also raises the question of what GTX480 performance would have been like with 128 TMUs... Sure, it's too early to really tell what GTX480's performance is, but eventually we can have some fun with that idea.
Jawed
Voltage and slightly higher clocks? Couple that with additional 64 CC and there you go
. Still - I'm not saying it's true, just not that hard to explain.Oh yeah, brainfart
Seems like a good idea for mainstream parts.
Which *is* overkill for graphics. AMD's approach seems more area efficient in the sense of $/mm aka balance b/w frequency-of-use vs. area. Is there a use case for int32 which I have missed?
With this in mind, I have to say, GF100 looks dp-heavy (by an appreciable amount) for a gpu.
If DP is very important for the markets NVIDIA is trying to reach (i.e. even more than with GT200), how is Fermi DP-heavy ?
Also, look at this:
http://techreport.com/articles.x/18332/5
Scott said:
Well, I would only consider that important (what the link says) if DP was physically taken from the chip. If the limitation is only on software/BIOS, it still is there occupying die space.
What the link says is that DP in Fermi based GeForces will be crippled, so that the Tesla products based on Fermi are more appealing. I'm not sure at this point, that it's just something that can be done through software. We will see.
Also, my question was related with the DP-Heavy remark, which doesn't add up for me, since it's in NVIDIA's interest to have as much DP as possible given the markets they want to get into even more.
Well they used to cripple GeForce's on Quadro's habilities through BIOS and software. I remember Soft-Modding my GeForce 4 Ti 4200
Well they used to cripple GeForce's on Quadro's habilities through BIOS and software. I remember Soft-Modding my GeForce 4 Ti 4200
It wasn't long after that that they stopped doing it in software....due to driverhacks
Based upon the scenario so far,
It makes 0 financial sense to focus on tesla to the detriment of graphics.
Fermi needs to win in graphics. Period.
Based upon my guesses regarding future evolution.
I think fermi is nv's bet that GF100 is priced too high to be of much use for gamers. It'll be able to recoup money from HPC market even if graphics perf is relatively less than what it could be. The mainstream gpu market has all the profits, so as long as the "pure" graphics side is efficient enough, high-end bloat doesn't matter. So fermi's possible loss of halo isn't such a big deal. Now that feature-parity with cpu's has been (well, almost..) achieved, they can just keep pumping up the core count in future generations.
It is risky if the top dog is delayed, since that is where all the graphics-side innovation happens.
Yes, but they haven't spent transistors useless to graphics on this scale before. G80/GT200 were monsters, but had very little area devoted to stuff which graphics doesn't need.
I can't see why you'd disable half your TMU's for the top dog. This rumour doesn't make any kind of sense from any angle.
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