Nvidia BigK GK110 Kepler Speculation Thread

The 192 cores SMX configuration for GK110 has been confirmed by Nvidia.

 

Who says GK110 is half-rate?

http://www.nvidia.com/content/tesla/pdf/NV_DS_TeslaK_Family_May_2012_LR.pdf

PCGH reports GK110 reaches 80-85% efficiency in DGEMM: http://www.pcgameshardware.de/aid,8...Us-auf-GTC-2012-vorgestellt/Grafikkarte/News/

14 SMX * 192SPS * 2 FLOPs * 0.85 * 880MHz /4 = ~1000 GFLOPs DP

 

Half, quarter, whatever it is it can't be same configuration as GK104 since GK104 is 192+8, not 192 capable of 1/24 or 192 which of 8 are FP64 fullrate capable

 

The M2090 is rated at 665 GFLOPS double precision. If it's only achieving around half of that in DGEMM it would be a remarkable improvement if Kepler doubled efficiency in that case.

 

With half-rate they could marketing a much higher gain over Fermi.
Maybe it is 1/3 SP per SMX with only 4 of the 6 ALUs processing it, 64 DP-FMA per SMX.

 

You forgot that every FMA/MAD counts as 2 FLOPS, so it'd be half-rate again.

 

Yeah, but the result includes the 2 FLOPs per SP.

But I think 1/3 seems more likely. It would be processed like on GF100/110, the the third super-scalar executed ALU would be without work.
So a bit over 1 TFLOPs DP could be reached with only ~700MHz to hold power down.

 

Big iron, as in, not my MacBook Air 11" running MS Word.

 

This pdf have been posted i dont remember where but thats all i have seen.
http://www.nvidia.com/content/tesla/pdf/NV_DS_TeslaK_Family_May_2012_LR.pdf

( lol sorry, one page ago here too )

 

No offense, but you should get your facts straight:

1. GK104 could have ECC on DRAM
2. GK104 *does not* have ECC on the register files, L1 or L2, go check NV's website

#2 is actually a very significant problem. Soft errors are much more problematic for on-chip SRAM than for DRAM. So having ECC on the DRAM really is just a marketing ploy.

Also, I'd point out that GK104 still sucks for general purpose workloads. If you talk to anyone at Nvidia with half a brain and a shred of honesty, they will readily admit that for quite a few workloads, Fermi is better than GK104.

GK110 is meant for computing, GK104 isn't.

DK

 

Very nice work : )

DK

 

If true then it's a pretty weird layout; 6 GPCs with 15 SMX?

 

Well, it's all about a good guess at this point, without some official spec's information. If not else, the two additional setup pipes are a welcome increase in the fragment output capacity, considering the vastly improved shader throughput, presented by all the 15 chubby multiprocessors.

 

Just like 192 was confirmed for GK104, while it was really 192+8? Is this also 192+something, or just 192 which of x can do FP64?

 

http://www.abload.de/img/0015bdxa.jpg

 

I must have been missing something, but why exactly is it 192+8 on GK104?

http://www.behardware.com/articles/857-2/review-nvidia-geforce-gtx-680.html
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It won't take long until the funky go merry rumors appear that the chip actually has N clusters, yet they hammered out X of them for 15 to remain only in the end

 

And according to several other sites like http://www.anandtech.com/show/5699/nvidia-geforce-gtx-680-review/2

 

The omission of ECC on-die was made more obvious when Nvidia listed the feature set of the GK110 against GK104. There must be a subset of HPC that can tolerate transient errors at the level of errors to be expected of gamer GPU SRAM, which may not be held to the same error rates a chip like Opteron would.

Is this a reactionary move to guard big Kepler's underside from Tahiti or its successor?


A fair number of the features outlined are understandably included in GCN's roadmap for now, soon, or very soon, though it could be just one of a number of instances where AMD gets to its own starting line later.