Regardless, my comment was related to the eventual rise of 3D-stacked LLC in GPUs and the acceleration of PCIe bandwidth.
In a little over 2 years we should have 128GB/s duplex bandwidth from a PCIe 16x connector and
more than 128GB/s over a 2-DIMM DDR5 motherboard.
Assuming 3D-stacking and cache ICs get cheaper as adoption rises, it could be more cost-efficient to get a midrange GPU that uses e.g. a 3D-stacked cache of 256MB covering over 75% of the bandwidth needs in a gaming load, and then just use the PCIe at ~100-120GB/s to cover the rest.
Perhaps this still isn't possible with PCIe 6.0 and DDR5, but on each iteration of PCIe and GPU architectures with larger LLC chunks I think we're getting closer to VRAM-less architectures.