Low-K process explanation

[Snarfy]

Could someone explain to me the low-k system i've been hearing about, and how it can increase clock speeds in the r420 line?

Thanks,
-Snarf

 

[Stryyder]

Could someone explain to me the low-k system i've been hearing about, and how it can increase clock speeds in the r420 line?

Thanks,
-Snarf

simple explanaton.

Low K coating and interconnects makes things more efficient lowering voltage requirements and eliminating cross talk between transistors allowing you to have more transistors than normal for that size die.

Less voltage and leaks, less heat..

Trade of is that the material isnt as strong and its relatively new.

 

[RussSchultz]

No. (Well, some of it is correct, but the reasoning is wrong)

Low K is describing the stuff between the interconnects. 'K' is the measurement of electromagnetic conductance. The lower it is, the less a signal on one interconnect is going to affect one that is beside it.

With less coupling, transitions happen quicker and wire delays are reduced, allowing the entire design to be easier to route and run faster (if the wire delays are the dominating factor--which is becoming more and more true as geometries shrink).

Low K has (almost) nothing to do with the transistor density.

 

[Stryyder]

Linky

http://nepp.nasa.gov/index_nasa.cfm/934/

more about the Black Diamond process ATI is using

http://www.semiconductorfabtech.com/site-waferprocessing/news/2001/01/18.01.shtml

http://news.zdnet.co.uk/hardware/chips/0,39020354,39145500,00.htm

 

[Stryyder]

No. (Well, some of it is correct, but the reasoning is wrong)

Low K is describing the stuff between the interconnects. 'K' is the measurement of electromagnetic conductance. The lower it is, the less a signal on one interconnect is going to affect one that is beside it.

With less coupling, transitions happen quicker and wire delays are reduced, allowing the entire design to be easier to route and run faster (if the wire delays are the dominating factor--which is becoming more and more true as geometries shrink).

Low K has (almost) nothing to do with the transistor density.

What I was trying to say is that low K allows a greater transistor density on any given die size as you can pack the transistors closer together because of the advantages gained in the low K interconnect... unless of course I am completely misunderstanding the technology (which is probably the case.)

 

[tazdevl]

No. (Well, some of it is correct, but the reasoning is wrong)

Low K is describing the stuff between the interconnects. 'K' is the measurement of electromagnetic conductance. The lower it is, the less a signal on one interconnect is going to affect one that is beside it.

With less coupling, transitions happen quicker and wire delays are reduced, allowing the entire design to be easier to route and run faster (if the wire delays are the dominating factor--which is becoming more and more true as geometries shrink).

Low K has (almost) nothing to do with the transistor density.

What I was trying to say is that low K allows a greater transistor density on any given die size as you can pack the transistors closer together because of the advantages gained in the low K interconnect... unless of course I am completely misunderstanding the technology (which is probably the case.)

Yup, that's the case.

The manufacturing process allows for greater density, i.e. .13m versus .15m, not Low-K. Low-K increases the efficiency which results in lower voltages and lower temps.

 

[Stryyder]

So basically low k would allow a .90 process to work which normally might not given the ineffeciencies of that many transistors on that many interconnects packed closely together.

 

[Joe DeFuria]

The manufacturing process allows for greater density, i.e. .13m versus .15m, not Low-K. Low-K increases the efficiency which results in lower voltages and lower temps.

Yes. Low-k should basically allow for one of the following (or combination):

1) Better yields at a given target clock rate (or Higher clock rate at a given yield target)
2) Lower power consumption at a given target clock rate (or higher clock rate for a given target power consumption.)

In other words, For Low-K, think "cooler and faster", rather than "higher density."

 

[RussSchultz]

http://www-306.ibm.com/chips/technology/makechip/8.html

Shows a isometric picture of an SRAM chip under an electron scanning microscope.

The transistors are below all of the interconnects. The interconnects don't affect the spacing of the transistors (much).

 

[Snarfy]

looks good for ati, then, speed wise, anyway

im worried about the lack of ps 3.0 for ati, tho, could hurt sales

 

[Stryyder]

looks good for ati, then, speed wise, anyway

im worried about the lack of ps 3.0 for ati, tho, could hurt sales

Maybe its a rope a dope probably not though.

 

[Wunderchu]

http://www-306.ibm.com/chips/technology/makechip/8.html

Shows a isometric picture of an SRAM chip under an electron scanning microscope.

The transistors are below all of the interconnects. The interconnects don't affect the spacing of the transistors (much).

that's a cool picture 8) .. thanx for the link, RussSchultz

 

[jbond04]

A lot of people are quick to jump to the conclusion that low-k = good and high-k = bad. However, this isn't always the case. Depending on your application, high-k can also give desirable results. Check out this link at Intel R&D for the whole scoop: http://www.intel.com/labs/features/si11031.htm

Here are some important highlights of what Intel found while researching high-k dielectrics:

-Moving to new high-k materials that control leakage is one step of many towards making transistors run cooler
-they reduce gate leakage by over 100 times, and therefore devices run cooler
-Intel anticipates that this shift to a new material will be one of the most significant in the evolution of the metal-oxide silicon (MOS) transistor

So while the R420 uses low-k dielectric material for the interconnects in its processor, other companies (like Intel) are moving to use high-k dielectrics for their transistors. Moral of the story: there is no good or bad guy in the world of dielectrics. Both low-k and high-k have their uses. I'm tired of hearing fanboys trumpet the benefits of low-k, when they don't even grasp how or why a lower capacitance is better for interconnects.

 

[karlotta]

Low-K is best right now. and is for 13 to 9 on GPUs. bet ya GPUs under 9 will be High-k.

 

[KimB]

Low K is describing the stuff between the interconnects. 'K' is the measurement of electromagnetic conductance.

The "K" has nothing to do with conductance. It has to do with capacitance. From what I understand, this material is used between the "gate" and the rest of the transistor. Using a low-k dielectric here increases the response time of the transistor, leading to less power loss (heat) or higher frequencies (usually a combination of both...but if you increase the frequency, you also increase power loss, so you don't necessarily get both).

 

[KimB]

-Moving to new high-k materials that control leakage is one step of many towards making transistors run cooler
-they reduce gate leakage by over 100 times, and therefore devices run cooler
-Intel anticipates that this shift to a new material will be one of the most significant in the evolution of the metal-oxide silicon (MOS) transistor

I think what you're seeing here is that they are moving to a very low conductance material, and it turns out that in order to increase the resistance of the gate dielectric enough, they had to move to one with a higher K. I don't think you're seeing a benefit of high capacitance, rather a side effect of high resistance.

So while the R420 uses low-k dielectric material for the interconnects in its processor, other companies (like Intel) are moving to use high-k dielectrics for their transistors. Moral of the story: there is no good or bad guy in the world of dielectrics. Both low-k and high-k have their uses. I'm tired of hearing fanboys trumpet the benefits of low-k, when they don't even grasp how or why a lower capacitance is better for interconnects.

Keep in mind that the high resistance materials, while they will reduce heat, will also decrease transistor switching speeds. This is probably not good for high-speed circuits, at least in the near-term, but would be excellent for handheld devices.

Edit: fixed, low conductance=high resistance.

 

[tazdevl]

k is for conductance not capacitance.

 

[gokickrocks]

k corresponds to capacitance

this link explains it quite well...
http://www.semiconductornotes.com/notes/ViewFile.asp?Which=30

 

[KimB]

k is for conductance not capacitance.

Were you responding to me or Russ? Either way, look two posts above yours.

 

[RussSchultz]

K is a factor in capacitance, but it is not capacitance.