I assume NVIDIA is still using what was in their patents a few years back, which is to say a circular buffer of tiles with shading parameters (pixels go in the first tile where their spot isn't occupied, if there is no tile available the oldest tile gets kicked to pixel shading to make room).
I'm wondering how AMD does it, but I don't feel like trawling the patents ... anyone want to enlighten me?
I'm wondering how AMD does it, but I don't feel like trawling the patents ... anyone want to enlighten me?
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