Strong possibility that the TSU might be fixed function logic ...I'm fairly sure that all GPU vendors can control most of GPU's innards through s/w (BIOS/MC and drivers). Whether this can be exposed through drivers into a public API is another issue which may not have a positive answer if such exposure would lead to more problems than performance wins.
Any time you use RTPSOs/TraceRay, Intel HW will automatically reorder threads for RT shader dispatch for free. There's virtually no explicit programming to be had with TSU as it is designed to be used implicitly with the RT pipeline. SER does have overhead which means it's HW implementation doesn't come at no performance cost like a fixed function unit would ...
Also it's a bad idea to use either to solve shader permutation since it increases register pressure/lowers occupancy. Intel wants developers to specialize their RT shaders with little to no branching as much as possible for best performance ...