esram astrophysics *spin-off*

Discussion in 'Console Technology' started by astrograd, Aug 3, 2013.

Thread Status:
Not open for further replies.
  1. astrograd

    Regular

    Joined:
    Feb 10, 2013
    Messages:
    418
    Likes Received:
    0
    To be fair, BS degrees are dime a dozen. Not PhD's. The area of study is pretty damn important though. In my experience theorists tend to understand a LOT more of the details of a system than experimentalists who mainly tinker on the engineering side of things (and yes, I'm shitting on engineers, but you're ok since you've got a BS in physics). :p
     
  2. zupallinere

    Regular Subscriber

    Joined:
    Sep 8, 2006
    Messages:
    768
    Likes Received:
    108
    The physicist card was already played by astrograd so now what's left in the deck?
    :)
     
  3. Gipsel

    Veteran

    Joined:
    Jan 4, 2010
    Messages:
    1,620
    Likes Received:
    264
    Location:
    Hamburg, Germany
    And again you completely miss the most important point. Namely that we speak of a flipflop as a clocked device. It will change it's state only on a certain, predetermined clock edge (either rising or falling edge). :lol:
    Would be a bit OT. But for starters, I would question that tighter packaging of transistors raises their drive current (at least that's how one could interprete your "higher probability of transmission" for the electrons). And while shrinking transistors indeed tends to increase their switching speed, I would prefer to use the more classical explanation of decreased capacitance. Your explanation better covers (a part of) the increased leakage (which is a bad side effect).
    Hey! I didn't introduce this "who else is a physicist?" topic. Maybe you didn't notice that my edit was just an answer to astrograd's boasting about his prowess as theoretical physicist and questioning the capability of others here to follow his arguments about quantum mechanics. I was just giving him a hint that this doesn't impress me much. So I'm on your side here. ;)

    edit @mods: Nice split and rename! :lol:
     
    #63 Gipsel, Aug 3, 2013
    Last edited by a moderator: Aug 3, 2013
  4. MrFox

    MrFox Deludedly Fantastic
    Legend Veteran

    Joined:
    Jan 7, 2012
    Messages:
    6,488
    Likes Received:
    5,996
    He was just defending me against astrograd because I'm a grade-school drop out. I didn't like this useless alphabet thing.
     
  5. bkilian

    Veteran

    Joined:
    Apr 22, 2006
    Messages:
    1,539
    Likes Received:
    3
    As far as I can tell, a PhD (negative log of hD?) tends to be highly specialised, and generally useless ;). I don't have any engineering degrees, all of mine are in theoretical sciences. Of course, everything I've done since college has been practical applications, so I suppose I'm an engineer in the end.

    As far as I remember, and I'm remembering from way before DDR days, I always had to build my circuit differently if I wanted to read a register out on both rising and falling clock.
     
  6. damienw

    Regular

    Joined:
    Sep 29, 2008
    Messages:
    504
    Likes Received:
    52
    Location:
    Seattle
    Why didn't you just invent a hyper-intelligent AI and holographic interface to help walk you through the problem?
    [​IMG]
     
  7. Gipsel

    Veteran

    Joined:
    Jan 4, 2010
    Messages:
    1,620
    Likes Received:
    264
    Location:
    Hamburg, Germany
    Some OT (maybe it's now even on topic given the name of the thread?) regarding degrees:
    I think one can make a distinction. While the thesis tends to be highly specialized and often useless (not generally, but I would say mine is :grin:, edit: I mean the thesis itself, of course not the work I've done), the same does not have to apply to all PhDs. And btw., pHD would be the negative log of the HD concentration (one of my minors was chemistry). ;)

    But as you appear not to have a high opinion of PhDs, I'm glad I'm officially not a "philosophiae doctor" in physics. In Germany we like to specify degrees a bit more fine grained, hence we got quite a lot of different doctor degree names for different fields. Philosophers (but it's not that strict: historians, philologists and some social sciences also count) get a Dr. phil. here, for the natural sciences it is usually called Dr. rer. nat. (short for "doctor rerum naturalium"), engineers can get a Dr.-Ing. (a German abbreviation, not a Latin one as obviously the old universities disliked to give that degree to engineers when it was introduced more than hundred years ago :lol:), for law it's called Dr. iur. and so on and so on.
    Good to know. Then I was not living in an alternate reality. Because that's how I learned it at some point, too.
     
    #67 Gipsel, Aug 4, 2013
    Last edited by a moderator: Aug 4, 2013
  8. bkilian

    Veteran

    Joined:
    Apr 22, 2006
    Messages:
    1,539
    Likes Received:
    3
    I don't have anything against PhDs, when I said they were "generally useless", I was using a play on the word "general". I'm just implying that outside of their doctoral domain, they tend to let their knowledge get stale :). I've seen it in industry folk too. They tend to get specialized over time. I purposefully change what I'm working on every few years so I don't get like that, but then I've always been a generalist.

    Always nice to be in the company of geeks who get obscure chemistry jokes though.
     
  9. Gipsel

    Veteran

    Joined:
    Jan 4, 2010
    Messages:
    1,620
    Likes Received:
    264
    Location:
    Hamburg, Germany
    For that generalist thing it's also helpful to spend some time doing something else than one is supposed to (hope my boss doesn't read this). :lol:
     
  10. temesgen

    Veteran Regular

    Joined:
    Jan 1, 2007
    Messages:
    1,679
    Likes Received:
    484
    Can't help but think that pic is what some expect next motion controls to be like.... :lol:
     
  11. astrograd

    Regular

    Joined:
    Feb 10, 2013
    Messages:
    418
    Likes Received:
    0
    I never said otherwise. I was simply noting that it too has its timing governed by physical parameters that are known to be in flux during manufacturing of complex new electronics (not saying flip flips are complex, juss sayin).

    Classical approaches to conductivity, resistivity, and capacitance run into problems when you get too small. For instnace, you get a capacitor small enough in empty space and the plates get sucked together from the virtual particles slamming into it from the outside (Casimir Effect). And where did you hear that capacitance is decreased as you shrink the size of them? Capacitance classically goes as the inverse of the distance between the plates. Do you mean the surface area of the plates shrinking (which is proportional to the capacitance)?

    Transistors only change state in the first place because of tunneling. You know that right? Leakage in the off state isn't the biggest concern. You want the ratio of on/off current to be really high to easily distinguish the two states and their energy bands.

    Btw, I wasn't "boasting" about anything. I have made an argument with specifics that conjectures a connectino between the eSRAM boost we heard about and the clock boost. Ppl seemed to confuse DDR with double pumping in the responses to said argument and we went back and forth and somewhere along the way someone asked how it might have ended up double pumping. Thus, I conjectured it might be from adjustments in the physical properties during manufacturing that bought some flexibility for the timings. I noted that transistors packed tightly together will allow for quicker state changes and someone asked me why.

    So I explained, using quantum tunnelling, a mechanism for that and THEN ppl decided to just sweep anything I had said under the rug because god forbid anyone invoke complicated physics that they don't understand. When it was suggested that I had just invoked it as if it were part of some pseudo-science hogwash I defended my use of the subject matter.
     
  12. astrograd

    Regular

    Joined:
    Feb 10, 2013
    Messages:
    418
    Likes Received:
    0
    Yeah probably because the timing was too challenging to work around any other way. Especially without the pool of memory being embedded. It is usually easier to double the actual clock.

    And yes, PhD's depend on the field whether they are useful or not. I'm personally in Cosmology and even more specifically my research is in quantum gravity models. Not a lot of private sector interest in that, ha! I would never say they are useless. A BS is largely useless though. Most schools are so desperate to get ppl through their physics programs they let anyone pass through the curriculum even without getting the grades.
     
  13. Cyan

    Cyan orange
    Legend Veteran

    Joined:
    Apr 24, 2007
    Messages:
    9,306
    Likes Received:
    2,988
    Love yah' all people. The title of this thread is awesome. I am sorry I can't write a meaningful reply but it's so late here and I gotta work tomorrow.

    p.s. All this technical jive sounds like hearing a term like Phase Coppers to me. I can understand what it means but I never cease to wonder how it works exactly. Gipsel and 3dilettante are very very very very very very very knowledgeable on the matter, so they can help astrograd to shed some light on the subject. I also see that bkillian is posting here too, but I gotta go, so yeah. GN
     
  14. Scott_Arm

    Legend

    Joined:
    Jun 16, 2004
    Messages:
    14,679
    Likes Received:
    6,748
    All I can say is that I have a huge appreciate for anyone that is highly educated in physics or pure math. It's a path I wish I'd taken when I was in school.
     
  15. Gipsel

    Veteran

    Joined:
    Jan 4, 2010
    Messages:
    1,620
    Likes Received:
    264
    Location:
    Hamburg, Germany
    I know this, but it doesn't apply to the problem at hand. You have to consider the largest effects first. :roll:
    I thought it is common (to B3Ders) knowledge? You probably have also not heard that a rough scaling law for the dynamic power consumption is often given as P~C*U²*f? Maybe you want to look up how much energy is needed to charge/discharge a capacity C to a voltage U f times a second and ask yourself how the power consumption can be reduced with a shrink? ;)
    No, I don't know that. I know that almost all integrated circuits use CMOS transistors which are field effect transistors. Ideally, the electric field of the voltage applied to the gate electrode controls the state of the transistor without any charges tunneling. The tunneling from the gate into the channel is unwanted leakage caused by the imperfect gate isolation. And there is a reason why the gate (and isolation) materials got changed when the industry arrived at smaller processes...
     
  16. astrograd

    Regular

    Joined:
    Feb 10, 2013
    Messages:
    418
    Likes Received:
    0
    The context of the discussion was something unexpected related to timings. Not what has the biggest effect.

    No, it depends on what you mean. If you mean to squeeze a capacitor in the axial direction, that makes the capacitance go up. If you mean to decrease its area, it goes down as you squeeze it. If you reduce the volume isotropically it would go down but I want to be sure what version of 'shrinking' you are talking about.

    C=[(dielectric constant)(permittivity of free space)(surface area)]/(surface separation)

    You're off by a factor of 2, but yes I'm well aware of the work done by charging a capacitor and it's time derivative averaged over a cycle. Remember who you are talking to here. Not bragging, but this is literally freshmen physics stuff here man. :???:

    Dude...I teach this stuff to 2nd semester pre-med students.

    Well now ya do. They are semiconductors which operate based on the quantum mechanics governing Bloch functions in solids. Those Bloch functions when treated properly are what gives you the band structure in semiconducting materials like transistor junctions. You have to excite the electrons with an external voltage or thermally to get them across the band gaps and to tunnel reliably and generate current.

    The electrons tunnel across the band gaps once you give them the energy to do so efficiently. That's how you get the current. When you immobilize the electrons once you've polarized your dielectric substrate you are killing their kinetic energy which kills the probability of tunneling. Removing the external electric field suddenly puts those electrons in a spot with very high charge density and as they repel one another their kinetic energies skyrocket and their transmission coefficients alongside it. That's how you add electrons to the 'electron sea' and boost the Fermi Energy to allow for conduction.

    Also, see: TFET's. Very useful for low power SRAM.
     
    #76 astrograd, Aug 4, 2013
    Last edited by a moderator: Aug 4, 2013
  17. aaaaa00

    Regular

    Joined:
    Jul 24, 2002
    Messages:
    790
    Likes Received:
    23
    To be fair,

    I worked on devices where we had a certain bus controller and storage device that was capable of operating at a variety of clocks, voltages, and both SDR and DDR modes. This was all configurable through software by setting some hardware registers.

    We ended up picking which clock and mode we shipped in based on thermals, power consumption, and stability.

    So it is (very slightly) theoretically possible MS built a controller that could run in a variety of transfer modes, built an SRAM array that also supported a variety of modes, simulated how it could operate, and settled on an initial clock rate and data mode.

    Then after they got the chip fabbed, real tests on the chip figured out what modes and clock rates it could actually safely operate in, and maybe they got lucky.

    By a lot.

    Yeah.

    Not saying this is what happened with Xbox One, but it is probably wrong to say this kind of thing is *impossible*. Very unlikely yes, but not impossible.
     
    #77 aaaaa00, Aug 4, 2013
    Last edited by a moderator: Aug 4, 2013
  18. Shifty Geezer

    Shifty Geezer uber-Troll!
    Moderator Legend

    Joined:
    Dec 7, 2004
    Messages:
    43,576
    Likes Received:
    16,033
    Location:
    Under my bridge
    This is an interesting debate because it's based on science and facts. There's no room for interpretation when it comes to how transistors and clocks work, which means suitably educated folk should reach consensus. Either it's possible, given the nature of small integrated circuits, for MS to have found an opportunity to read twice on the clocks as astrograd says, or its not as Gipsel says. I would like to see, just for once in this life, an argument where two different viewpoints in discussion resolve to one as someone comes to see how they were wrong - either Gipsel saying, "oh, I didn't know that. In that case you may be right," or astrograd saying, "I've been reading papers on this for five years, but you're saying it doesn't really work that way. Wow, okay, I guess I was wrong then," or something. It'd also be nice for the topic if we could come away with some sort of explanation for the eSRAM BW change, which, with two diametrical opposed voices and no frame of reference of my own, remains a question mark to me.

    That said, I have nothing to contribute to this thread and can only hope Gipsel and astrograd and whoever else is suitably educated and interested go the whole hog and discuss to a worthwhile conclusion. I do respect astrograd for not backing down earlier on and pushing the discussion in this direction. ;)
     
  19. Betanumerical

    Veteran

    Joined:
    Aug 20, 2007
    Messages:
    1,753
    Likes Received:
    265
    Location:
    In the land of the drop bears
    I think one of the bigger problems people have with the reasoning is it relies on you having a memory controller that has a DDR for 15/16 clocks and a SDR for 16/16th clock
     
  20. Gipsel

    Veteran

    Joined:
    Jan 4, 2010
    Messages:
    1,620
    Likes Received:
    264
    Location:
    Hamburg, Germany
    I would claim that in your example it only worked, because the possibility of both SDR and DDR modes where considered in the design. Astrograd is basically claiming that one could switch to "double pumping" on any interface and one doesn't have to consider it in the design, that it is just a matter of timing margins (possible clocks are a matter of timing margins, such mode changes have to be taken care of in the design). Of course you can build something capable of multiple modes. But then you know of this capability before the silicon comes back from the fab, simply because it was designed that way.


    @astrograd:
    I still don't get how the Casimir effect and the restricted spectrum of vacuum fluctuations between two metallic plates have any closer relevance to the timings of a CMOS circuit.
    And nice dodge on the transistor state change. But it is still done in the first place by applying a voltage to the gate. You overrate the tunneling in my opinion. The current through the channel is not tunneling if you switch the transistor to create a conductive channel. And a thermal excitation isn't tunneling neither.

    And look how a planar transistor looks like and now imagine a node shrink so the consumed area halves (and yes, I know it isn't done exactly this way anymore). Things change a bit with FinFETs, but otherwise the gate electrode area usually goes down with a shrink (which is a significant factor for the severe subthreshold leakage problems we got, not so much the area but the length).
    And btw., that scaling law can't be off by a factor of 2. It only gives the proportionality of changes. You can rescale with any constant factor that pleases you. That's the reason you haven't seen an "=" sign in it (∝, as commonly used today in English for proportionality is usually hard to find on a keyboard, the German version "~" much easier, and it also designates similarity in geometry, which is actually quite close to mean being proportional [same shape, scaled in size, can be rotated or flipped], which is why one may find it occasionally also in English texts with this meaning; just to give you the reason for my choice). As I explicitly mentioned a scaling law, I hoped it would be understandable. You can't use it to directly calculate the power consumption anyway without adding a few other terms (especially with todays small feature sizes, some years ago it was a better aproximation). But it still catches the main effect and was just meant to illustrate the importance of the capacitance.

    On another note, maybe TFETs become useful for some low power SRAM (and are relying on band to band tunneling for carrier injection), but these are simply not used in all the prevalent CMOS devices. ;)

    I think it doesn't make sense to dig deeper into that stuff as it has not much to do with the original point made. Agreed?
     
    #80 Gipsel, Aug 4, 2013
    Last edited by a moderator: Aug 4, 2013
Loading...
Thread Status:
Not open for further replies.

Share This Page

  • About Us

    Beyond3D has been around for over a decade and prides itself on being the best place on the web for in-depth, technically-driven discussion and analysis of 3D graphics hardware. If you love pixels and transistors, you've come to the right place!

    Beyond3D is proudly published by GPU Tools Ltd.
Loading...