That wouldn't have an effect on what we're discussing here because we're not comparing 2 separate chips or rendering paths.No change is free, but when a change is 800% more power efficient than another, then you can't use transistor states changes as a metric.
The only difference here is power levels for a given workload, and the associated clock speed of it. The fixed function primitive engine is incapable of producing pixel triangles, it would stall out attempting to do run UE5 through it's FF pipeline.
Epic has already clarified that it's running both lighting and geometry through compute shaders, so the hardware requirements are the same regardless. Compute Shaders can saturate CUs very well which represent a majority of the die size of the chip. The ask is whether more denser geometry or less dense geometry will increase power, but that becomes a discussion with how the primitive engine works.
If you attempted to run UE5 using standard rendering path the power output would be nearly 0. The system would stall out completely waiting and you'd be lucky to get 1 fps. Simpler geometry runs faster because ROPS are designed to issue 1 triangle for every 16 pixels, 2 triangles per clock at peak performance per shader engine. If you get more dense that than, your triangle output drops rapidly, quickly becoming a bottleneck for the rest of the pipeline. At 1 triangle per 4 pixels it will definitely bit a severe performance deficit so much so that no amount of clockspeed will be able to make up for this loss soon enough. At 2 pixel triangles or 1 pixel triangles or sub pixel triangles, the GPU is going to quick approach unusable. When you push the limits of the dense geometry in this way it becomes the bottleneck for everything else, and everything else will run slower as a result waiting.
This won't be the case for running the entire pipeline through compute shaders.
I provided a graph of triangle/pixel performance here: If geometric density means approaching 1:1 triangle/pixel density. You can see how quickly the performance drops off. Thus more dense geometry means worse performance for the whole pipeline.
tile(8,8) is already 1/2 the performance of tile (16,16), and tile(4,4) is nearly 8x worse and completely falls of a cliff afterwards.
https://forum.beyond3d.com/posts/2125567/
If you are doing everything through compute shaders, well then the hardware is the same, more clockspeed for the same workload will invariably mean more power consumption.
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