AMD: Speculation, Rumors, and Discussion (Archive)

GDDR5X won't start mass prodution 'till Q3 this year, so it would have to come much later than anything else

 

Fiji samples were going around for 75k so this is the big dog. The third chip which Charlie has been talking of imho ratheṛ ṭhan a boring dualie.

 

The "third chip" is most likely part of MCM-module, the one they used to call "Greenland" before changing codenames to stars, and wouldn't end up as a separate product. All AMD communications so far suggest that there will indeed be only 2 Polaris GPUs, which will be used on 4 or more products. Of course there's rumours about "Vega", but it could either be the old Greenland (aka on MCM, not graphics card) or just made up rumour, or heck, even next gen after Polaris, which would mean it wouldn't come 'till very, very late this year or more likely sometime next year.

 

Greenland on MCM is almost certainly Greenland on interposer along with HBM (since HBM requires an interposer due to the quantity of connections). So Greenland could easily come off the MCM and be a discrete GPU too.

 

Charlie has been pretty adamant that there are three chips, he also thinks that the biggest one wasn't named Greenland to begin with.

https://semiaccurate.com/forums/showpost.php?p=252525&postcount=120

Fury X2 samples were C888 while Fury itself was C880. This otoh is C993 to C98x from the previous listings. Looks like a 300-400mm2 30-40% faster than Fury X part to me.

 

If the latest leaked slides are true, it might not have traditional buses though, but would instead communicate via the new GMI-links

 

It could have both, PHY for PCI Express is not exactly huge.

Oh, and isn't there a rumour that GMI is PCI Express with go-faster stripes?

 

The biggest Polaris chip has apparently shipped in working order: http://wccftech.com/amd-fury-polaris-successor-spotted-zauba/

$1,700 for estimated value. Obviously not the previous two chips spotted (probably Polaris 10/11) and probably a fully enabled compute heavy chip with a lot of ram.

 

Haven't heard that rumour, nor rumour that there's "go 3-4x faster stripes"

 

That link 404's for me

 

Ah, yup. Not a clue what happened. False? Web error? Not a clue, if it's real it'll hopefully pop back up somewhere else, so whatever.

 

It's quite real, it already popped up one page back with german site 3dcenter having an article out yesterday.

Here's the google cache anyway,

http://webcache.googleusercontent.c...ssor-spotted-zauba/+&cd=1&hl=en&ct=clnk&gl=in

The zauba listings are here for AMD so you can make your conclusions yourself instead of the clickbait wccf.

https://www.zauba.com/import-/hs-code-84733030/fp-canada/ip-INHYD4-hs-code.html

 

Sticking to the rumour, it is like four on-package GMI links with a total of 100 GB/s bandwidth. That would be 25 GB/s per link, and assuming it is bi-directional 16-bit SerDes, 6.25 GT/s would be the data rate.

 

Could just be more lanes. PCIe is very well designed and has no obvious flaws, has plenty of existing good controller IP and the licensing allows for it to be easily modified into a custom bus. Because of this, a lot of modern custom buses are just PCIe under a different name. Unlike in the past years, there is very little to gain from the work required to design something new.

 

Except that it's more likely dual-GPU than successor, simply due the fact that AMD has stated that there will be just 2 GPUs this year (Polaris). Of course it's possible that they're just lying for smoke and mirrors but...

 

That would be something AMD products have offered before, if going by the link bandwidth of AMD's Opterons. It would mean no significant increase (or rather a slight decrease in GT/s) since 2011, however.

I have been trying to puzzle through whether the HPC APU is the same thing as this MCM package. It already breaks the definition of APU, and without an interposer that AMD's "dis-integration" future would have predicted.
Combining the various features gives a hefty aggregate IO count. 4 DDR4 channels, 64 PCIe, and then there's 4x25GB/s GMI link that would be IO on both the CPU and GPU chips.

Keeping the PHY matching, which is already hinted at in the slide that says one PCIe section can be repurposed to different IO standards that have aligned with PCIe, could keep that amount of perimeter real-estate from becoming single-purpose, but perhaps some of the advances over the years could cut down the physical investment by upping speed and reducing link width.

The server CPU could get away with it since it could use it for a multisocket solution.
What a discrete Greenland would do with enough IO to exhaust one side of a Fiji die is uncertain.
Where the 64 lanes of PCIe go in addition to all that is not clear to me.

Some years ago, AMD briefly roadmapped coherence over PCIe, and then silently dropped it. Perhaps this is a return of sorts? Even without adopting PCIe, a lot of the same physical design decisions get made due to the same reasons.
NVLink seems to have some common decisions, and it bumps speed up by not being as physically accommodating as PCIe must be.
Perhaps GMI's interface has different capabilities based on what it has to traverse. An MCM package could give some speed benefits over a connection for an expansion bus.

 

Keep seeing this as fact, but the only source is a Forbes article that paraphrases Raja as saying he's promising 2 GPUs this year. It could be a misquote, it could be that they're launching two in the middle of the year and one later, it could be a misunderstanding completely. Being that there's been repeated evidence of three different GPUs taped out, and now delivered, maybe it's time to drop the pretense that a vaguely worded sentence from a single article is accurate in implying more than it even said to begin with.

IF a $1,700 GPU is coming out (and why would a dual Polaris GPU be shipping already when the single GPUs haven't even hit retail?) then we can just assume it's the biggest, fully enabled, and has 16gb of ram.

 

It's not just the Forbes article where they've said it, even if it's the only public one (not sure if it is, but can't be bothered to check in the middle of super bowl)
Anyway, these are protoboards, not retail shippings, Dual Fiji protos were around when Fiji launched in really small numbers, it's not too far reached that they would have Polaris 11 dual board prototypes going already.
It actually makes sense too, dual GPUs are nothing but good for VR. They mentioned that Polaris 11 meets VR requirements (aka at minimum R9 290/GTX970 performance), slapping 2 of those on one board for VR solution one step down from Dual Fiji is simply sensible solution.
Forget marketing as "X2" or some such, just call it Radeon VR 490 or Radeon R9 490 VR or something

 

I don't see any reason for AMD to change their codenames for zauba shipping manifests unlike their consumer hardware. Big daddy Polaris(or Vega) it is.

 

If you're referring to the Cxxx-number it's PCB model number and dual GPU's PCB model numbers follow the exact same suit as single GPU ones, there's nothing in the PCB codename that could tell it's single or dual GPU product