AMD: Southern Islands (7*** series) Speculation/ Rumour Thread

I see 11, too

 

Well, unless AMD opted for 32-bit channel architecture--one DRAM device per channel, what we see now is very confusing.

 

Now I see even the 12th, it's between the green sticker a PCB border (near PCIe)

 

what about the power plugs ? 2x8 pin, 8+6 pin or 2x6 pin ?

 

Please refer to this article if you want to see my edited picture (derived from a picture posted above) with numbered memory chips:

http://www.techsweden.org/nyhet/lCRC-de-forsta-bilderna-pa-amd-radeon-7970/

 

LOL, I didn't saw that one!

That one below must be in a very tight fit.

 

384bit MC seems to be double-confirmed now.

 

fix't

 

There has to be one between the GPU and the PCIe interface. If you look closely, the area where the chips are is of a slightly different color:

 

I dare to say it's at least TRIPLE-CONFIRMED!!!

 

8+6 pin

 

If there shouldn't be any sort of switchable "turbo mode" to justify 6+8pin, then former "rumors" indicating comparable GF560 power consumption were just bullshit.

 

Remember that it is an ES. If it is not a basically final version, it may have kind of an oversized power circuitry.

Nevertheless, I don't think the TDP will be significantly less than 200W, probably slightly more.

 

On the last article Charlie did about Tahiti, he did say that things would be getting even more silly. At the time I already interpreted that as something he did not like. Power consumption is probably a good candidate.

 

Considering the source, it's probably lack of open-source Linux drivers for the part, on the day of release. That is totally a deal-breaker, and undoubtedly a reason for never-ending hatred.

 

It has 8+6pin like all the highend last gen

 

Seriously, did anyone expect the power consumption to drop radically? I mean sure, 28nm allows that, but if you want more performance too it's not that simple anymore

 

Exactly.

The first question should always be, what an IHV tries to accomplish. AMD wants at least 50% more performance through the bank, on some cases even way higher. Now, you should ask yourself, how can they get it? If you have a process that is still maturing and theoretically gives you 50% more performance or 50% power savings, you cannot have both, not if you didn´t radically change something in the design itself. And by radical, I mean something like pre-G80 -> G80 generation.

 

You certainly mean Cayman, but that was a Plan B afaik, since it was destined to be 32nm, before that node was canceled. Cypress was only 2x6pin. So, I bet some people, including Charlie, were expecting 2x6pin for Tahiti also.

I loled