AMD Radeon RDNA2 Navi (RX 6500, 6600, 6700, 6800, 6900 XT)

Here's a bit about the fidelityfx ao implemented in WoW

https://us.forums.blizzard.com/en/wow/t/improved-graphical-fidelity-in-wow/723597

 

AMD still maintains 2:1 ratio for the depth-buffer sampling rate? I thought they moved to 4:1 years ago.

 

I don't think so

Sources for both are available on GitHub under MIT license
https://github.com/GPUOpen-Effects/FidelityFX-SSSR
https://github.com/GPUOpen-Effects/FidelityFX-CACAO

 

Waves to @Rys

 

Fidelity-RYS incoming? (RaYSorting .... )

 

Doubt Nvidia or Intel will be using these.

 

Yeah I don't get this. I thought it was confirmed that Navi21 had 4 shader engines so should be 8 ACEs in total. Only 1 ACE per SE now? 10 WGPs per ACE??

 

It is more curios. Navi 21 has 8 Scanconverter when you look at driver statment that means 8 SEs but only 4 ACE....

 

Yes of course.
It's not like nvidia ever copied AMD's open source Radeon Image Sharpening and launched their "own" Nvidia Image Sharpening about 5 months later, back when DLSS was still a pretty terrible justification for having tensor cores in consumer graphics cards.

 

Lol ... Image Sharpening filters were in use by developers long before AMD created RIS. Can't say the same about DLSS.

 

Developers will decide that, not Intel or Nvidia. It's just shader code after all just like Nvidia's HBAO.

 

That's always the case. Though I imagine some optimizations will require access to features on the hardware, ie ampere's motion blur hardware.

Edit: Clarification

 

Also this stuff usually works great on both Nvidia and AMD. At least TressFX did.

 

So with AMD we will go from Poor Volta to losing 10 bucks bets?

 

There's so much mixed info re/supply floating around.
https://hardforum.com/threads/radeon-6000-series-speculation.2001864/page-13#post-1044808902

 

Dog-fooding

 

Two interesting quotes from that single post:

So day-one stock will be low, but replenishment will be steady. I believe videocardz got about the same info where retailers are expecting more stock by the end of the day tomorrow.
This is in stark contrast to nvidia who got all retailers to dry for at least a week IIRC.

Aaand despite the steady replenishment, stock will still be pretty bad because people who couldn't get a RTX 30 are now potential customers to AMD's RX 6800.

 

Holy smokes, I was wondering how we could summon you

 

ACEs are front end processors without a fixed relationship with shader engines. The number of ACEs per shader engine has varied over GCN's lifetime. The PS4 had 8 for 2, Hawaii had 8 for 4, Fury had 4 for 4, APUs have had 1/2 for 1, etc.
I haven't seen restrictions in the number of CUs that could be addressed by an ACE in the past. Given how long it took for decent adoption of asynchronous compute, getting one queue to be used would be a likely minimum and it's not like those scenarios couldn't access all CUs. Other marketing for things like rapid response queues seemed to show allocations that spanned shader engines as well.

 

Doesn't HWS supplant ACE? Or it's another module that provides more finely-controllable use of async compute?