AMD: R9xx Speculation

Radeon 4850 was changed to 5750. The 5k cards created the new(old) 57xx line cards. I dont see a problem with 6800 cards being the old 5700 cards like before.
Everyone is watching the price in the end, and not model numbers. The shocking (for nvidia sure :LOL:) would be if they sell 5850 performance for 5700 price :cool:.

Edit: Also for many people "upgrade" from 4850 to an 5770 doesnt sound to promising. (in fact it isnt :) ) So from marketing standpoint its not a bad idea.
 
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... I dont see a problem with 6800 cards being the old 5700 cards like before....


I see a problem. Potential customers would be really really confused what is going on and AMD would have to explain to everybody their new names.
And also.... Charlie wrote:


I don't take that site seriously any more. Last I heard, Cayman was 6800, Antilles was 6900, and Barts was 6700.

-Charlie


http://semiaccurate.com/forums/showthread.php?t=2994&page=60


So, I think this myth is busted. :LOL:
 
I see a problem. Potential customers would be really really confused what is going on and AMD would have to explain to everybody their new names.
And also.... Charlie wrote:





http://semiaccurate.com/forums/showthread.php?t=2994&page=60


So, I think this myth is busted. :LOL:

Also nApoleon said that this all thing of Bart being the 6800 series is a smoke bomb made by AMD
Anyway, if the 6770 is as fast as the 5870, that's means that the 6750 will be as fast as the 5850?
Holy Cow! 0_0
I might change my 5770... tired of playing ME2 with just 2xSSAA :D
 
Just one last comment on the naming-scheme thingy.

Here's the lineup I'd try to sell (marketing-wise), given recent guesstimation and a purely marketing/business oriented mind: ;)

HD 67xx series
HD6750: Turks XT= 16ROPs, 40TMUs, 160 4D-Shaders, 128Bit memory bus (@900Mhz ~ 1.152GFLOPs; real-world gaming perf. in between HD5770/HD5830; TDP 110W) / Oct. 2010
HD6770: Barts Pro = 32ROPs, 72TMUs, 280 4D-Shaders, 256Bit memory bus (@700Mhz ~1.568GFLOPs; real-world gaming perf. in between HD5830/50, TDP 135W) / Nov. 2010

HD 68xx series
HD6850: Barts XT = 32ROPs, 80TMUs, 320 4D-Shaders, 256Bit memory bus (@ 850Mhz ~ 2.176GFLOPs; real-world gaming perf. slightly below HD5870, TDP 175W) / Oct. 2010
HD6870: Cayman Pro = 48ROPs, 112TMUs, 440 4D-Shaders, 256Bit memory bus (@ 725Mhz ~ 2.552GFOPs; real-world gaming perf. HD5870+20%, TDP 210W) / Nov. 2010

HD 69xx series
HD 6950: Cayman XT = 48ROPs, 120TMUs, 480 4D-Shaders, 256Bit memory bus (@ 850Mhz ~ 3.264GFLOPs; real-world gaming perf. HD5970, TDP 260W) / Oct. 2010
HD 6970: 2x Barts XT =64ROPs, 160TMUs, 640 4D-Shaders, 2x, 256Bit memory bus (@825Mhz ~ 4.224GFLOPs; real-world gaming perf. HD5970+20%; TDP 280W) / Nov. 2010
HD 6990: 2x Cayman XT = 96ROPs, 240TMUs, 960 4D-Shaders, 2x, 256Bit memory bus (@675Mhz ~ 5.184GFLOPs; real-world gaming perf. HD5970+40%; TDP 295W) / Dez. 2010


Basic ideas behind this:

(1) [assumed conundrum:] Barts turned out to offer real-world performance ~ Cypress clock-for-clock; big question: How to market such a chip? Answer:
(2) "mix" chips within naming-scheme-related "families" in order to meet optimal price/performance/power points in relation to old HD5xxx series
(3) at first, only launch one chip per naming-scheme family to keep confusion low (Turks@HD57xx; Barts@HD58xx; Cayman@HD59xx), then "slot in" the respective lower-clocked/partly deactivated/salvage parts a few weeks later (as they'd "fit in" at the HD6x70 level respectively, make some extra profit with people always wanting the next fastest card)
(4) When all is said and down, release the ultra-high-end, OC-ready 2xCayman XT (HD6990) card to make some more money on the overclocking-enthusiasts that already bought HD6950 and HD6970 before :devilish:

"BS" or not - I'd like such a lineup :)
 
Current memory controller doesn't allow to use 48 ROPs with 256bit bus. I doub't we'll see more than 32 ROPs per GPU for this generation...
 
Current memory controller doesn't allow to use 48 ROPs with 256bit bus. I doub't we'll see more than 32 ROPs per GPU for this generation...
Don't lay too much weight on those "specs" - I just added them to illustrated my point a bit. My main concern is the naming (in relation to feasible performance/power/price points).

=========

EDIT: Oh, and as for this interesting point:
They aren't going to have only one crossfire connection on their highend series.
From a sheer profit-perspective, if you'd rather have your tripple/quad-crossfire customers buy 2x HD 6970 (with 2xBarts, cf. my earlier post) @ 599$ each instead of 4x HD 6850 (with 1xBarts, cf. my earlier post) @ $299 each, it makes perfect sense to drop that second crossfire connection on your "best-bang-for-buck" card.

Also, isn't Barts using a 5850 PCB? Same length, just a completely different layout?
Well, well, well - so that card might actually turn out to sell under the name of "HD 6850"? ;)

Of course, some of you still think it more plausible that the new HD 67xx cards will use PCBs exhibiting a complexity (and cost!) roughly equivalent to today's 58xx series. Yeah. Nice way to raise your profit-margins on those new high-midrange cards ... :devilish:

If you get your Barts-silicon back, test it, and find out that, performance-wise, you could actually tweak that high-midrange chip to sell it in the (~ HD 6850) high-end market (with a high-end price tag!), you'd be stupid not to do it (sacrificing your usual naming-scheme or not).

Don't expect a highly indebted company like AMD to waste any profits just to make you a nice "58xx performance @ 67xx price tag" Christmas-present ...
 
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Thinking about the ROPs, AMD really needs to work on the depth-buffer sampling performance. GF100 as of now is simply wiping off Cypress in sustained (not theoretical) Z-rate, with almost 2.5x factor!
And that comes from both the sheer unit count and utilization efficiency on top of it.
 
EDIT: Oh, and as for this interesting point:
From a sheer profit-perspective, if you'd rather have your tripple/quad-crossfire customers buy 2x HD 6970 (with 2xBarts, cf. my earlier post) @ 599$ each instead of 4x HD 6850 (with 1xBarts, cf. my earlier post) @ $299 each, it makes perfect sense to drop that second crossfire connection on your "best-bang-for-buck" card.
High end rarely is "best bang for buck"
 
Thinking about the ROPs, AMD really needs to work on the depth-buffer sampling performance. GF100 as of now is simply wiping off Cypress in sustained (not theoretical) Z-rate, with almost 2.5x factor!
And that comes from both the sheer unit count and utilization efficiency on top of it.
What good is to have 2.5 higher z-performance, if the gaming performance is 15-20% higher at the average? I see it just as another sign of inefficiency. It's the same kind of overkill as fermi's 4-times higher triangle rate.
 
High end rarely is "best bang for buck"
What I was driving at is that AMD’s HD x850 cards usually turned out to provide the best price/performance ratio in the high-end segment, with 2xHD5850 basically delivering HD5970 performance for a cheaper overall price.

Given that I expect AMD to strengthen the enthusiast segment (HD 69xx series, pricing probably $499 and up), it would be a rather smart move to “protect” that segment (and the profits to be earned there) by restricting crossfire-x support on their HD 6850 card (which might very well reign as new price/performance king in the high-end segment).

In my line-up suggestion as posted further above, Cayman Pro (i.e. HD 6870) would go head-to-head with GTX 480 performance-wise; don't expect such a card to sell for less than $399 - $449 given the current competition.
 
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no-X said:
What good is to have 2.5 higher z-performance, if the gaming performance is 15-20% higher at the average? I see it just as another sign of inefficiency. It's the same kind of overkill as fermi's 4-times higher triangle rate.

What good is it to have 2x more flops if gaming performance is 15-20% less, on average?
 
What good is to have 2.5 higher z-performance, if the gaming performance is 15-20% higher at the average? I see it just as another sign of inefficiency. It's the same kind of overkill as fermi's 4-times higher triangle rate.

They're not independent of each other. Without fast z-rates games that make use of an z-prepass or doing stencil shadowing would be slower, so the question really is: Is the die-area invested in making the ROPs able to do 8 zpc so big that it would make a notable difference edit: if invested elsewhere.
 
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What good is it to have 2x more flops if gaming performance is 15-20% less, on average?
ATi's flop is more than 3-times cheaper than nVidia's flop in terms of die area. It means, that ATi's approach results in better efficiency, better margins for ATi and better price/performance for customer.
 
ATI/AMD have had a chip SKU cross the boundary between the different series of cards. I don't know how many are this way but some of the 5670 chips are infact chopped up Juniper dies. There already has been precedent here but AFAIK it has never been done so much at the start of a product generation.

From what I can tell ATI/AMD defines their chips by the power use now so perhaps we can assume that the current design rules will apply moving forward as well.

HD x6xx = no PCI-E power adapter. = <75W
HD x7xx = 1 PCI-E 6 pin power adapter = <150W
HD x8xx = 2 PCI-E 6 pin power adapters = <225W
HD x9xx = 1 PCI-E 6 pin, 1 PCI-E 8 pin power adapters. = :love:00W

A good way to prevent people from taking a lower end SKU and overclocking it to much higher performance is to limit the available power.

So for instance if some of the above speculation is true then Barts Pro with a power <150W could not be turned into Barts XT under overclock conditions and the same is true for Cayman Pro with <225W which cannot be turned into Cayman XT. I remember Dave was discussing SKU segmentation in one of the other threads, can't remember which. Anyway reading between the lines of how he made his comments theres probably been a lot of internal discussion of how to segment their upcoming product ranges.

Lastly, I don't know how to fit this in but if we are looking at what should have been 32nm or similar designs brought backwards to 40nm it makes sense that each chip jumps up one SKU level given they won't follow the same power guidelines as the previous generation given the fact theres no shrink available to keep overall TDP levels down. Since they can only move upwards, each chip would therefore have to bridge to the next level of chip performance.
 
http://www.techreport.com/articles.x/14990/5

Hartog identified the RV670's Z rate as the primary limiting factor in the RV670's antialiasing performance.
I've never seen (or forgotten) an evaluation of the balance of Z rate for shadow buffer rendering versus MSAA, i.e. which benefits the most from the change in RV670->RV770. It's worth remembering that multiple shadow buffers per frame are quite common, both as cascades and for multiple lights.

The table on that TechReport page also highlights that fillrate for 64-bit pixels doubled in RV770 over RV670. Obviously 64-bit pixels are quite common these days and a major factor in performance.

I don't think ET:QW uses 64-bit pixels, (unsure):

http://www.techreport.com/articles.x/14990/11
 
Thinking about the ROPs, AMD really needs to work on the depth-buffer sampling performance. GF100 as of now is simply wiping off Cypress in sustained (not theoretical) Z-rate, with almost 2.5x factor!
And that comes from both the sheer unit count and utilization efficiency on top of it.

Do you have a source for measured Z-rate between GF100 and Cypress? Don't think I've ever seen that covered in a review.

Edit: there's this but it's nowhere close to 2.5x.
 
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